EFM32WG Datasheet, PDF (523/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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20.3.1.3.2 Compare/ Capture Channel 1 Input
The Timer can also be clocked by positive and/or negative edges on the Compare/Capture channel 1
input. This input can either come from the TIMn_CC1 pin or one of the PRS channels. The input signal
must not have a higher frequency than f_HFPERCLK/3 when running from a pin input or a PRS input with
FILT enabled in TIMERn_CCx_CTRL. When running from PRS without FILT, the frequency can be as
high as f_HFPERCLK. Note that when clocking the Timer from the same pulse that triggers a start (through
RISEA/FALLA in TIMERn_CTRL), the starting pulse will not update the Counter Value.
20.3.1.3.3 Underflow/Overflow from Neighboring Timer
All Timers are linked together (see Figure 20.4 (p. 523) ), allowing timers to count on overflow/underflow
from the lower numbered neighbouring timers to form a 32-bit or 48-bit timer. Note that all timers must
be set to same count direction and less significant timer(s) can only be set to count up or down.
Figure 20.4. TIMER Connections
TIMER2
Underflow
Overflow ^TIMER1
Underflow
Overflow ^TIMER0
20.3.1.4 One-Shot Mode
By default, the counter counts continuously until it is stopped. If the OSMEN bit is set in the
TIMERn_CTRL register, however, the counter is disabled by hardware on the first update event. Note
that when the counter is running with CC1 as clock source (0b01 in CLKSEL in TIMERn_CTRL) and
OSMEN is set, a CC1 capture event will not take place on the update event (CC1 rising edge) that stops
the Timer.
20.3.1.5 Top Value Buffer
The TIMERn_TOP register can be altered either by writing it directly or by writing to the TIMER_TOPB
(buffer) register. When writing to the buffer register the TIMERn_TOPB register will be written to
TIMERn_TOP on the next update event. Buffering ensures that the TOP value is not set below the
actual count value. The TOPBV flag in TIMERn_STATUS indicates whether the TIMERn_TOPB register
contains data that have not yet been written to the TIMERn_TOP register (see Figure 20.5 (p. 523) .
Figure 20.5. TIMER TOP Value Update Functionality
APB Writ e (TOPB)
Updat e event
APB Writ e (TOP)
Load APB TOPB
Set
TOPBV
Clear
Load TOPB
TOP
Load APB
20.3.1.6 Quadrature Decoder
Quadrature Decoding mode is used to track motion and determine both rotation direction and position.
The Quadrature Decoder uses two input channels that are 90 degrees out of phase (see Figure 20.6 (p.
524) ).
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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