EFM32WG Datasheet, PDF (366/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Reset
Access Description
Indicates the amount of free space (locations) available in the Non-periodic Transmit Request Queue. This queue holds both IN and
OUT requests in Host mode. Device mode has only IN requests.
15:0
NPTXFSPCAVAIL
0x0200
R
Non-periodic TxFIFO Space Available
Indicates the amount of free space available in the Non-periodic TxFIFO. Values are in terms of 32-bit words.
15.6.20 USB_GDFIFOCFG - Global DFIFO Configuration Register
Offset
0x3C05C
Bit Position
Reset
Access
Name
Bit
31:16
15:0
Name
Reset
Access Description
EPINFOBASEADDR
0x01F2
RW
Endpoint Info Base Address
This field provides the start address of the EP info controller.
GDFIFOCFG
0x0200
RW
DFIFO Config
This field is for dynamic programming of the DFIFO Size. This value takes effect only when the application programs a non zero
value to this register. The core does not have any corrective logic if the FIFO sizes are programmed incorrectly.
15.6.21 USB_HPTXFSIZ - Host Periodic Transmit FIFO Size Register
This register holds the size and the memory start address of the Periodic TxFIFO.
Offset
0x3C100
Bit Position
Reset
Access
Name
Bit
31:26
25:16
15:11
10:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
PTXFSIZE
0x200
RW
Host Periodic TxFIFO Depth
This value is in terms of 32-bit words. Minimum value is 16. Maximum value is 512.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
PTXFSTADDR
0x400
RW
Host Periodic TxFIFO Start Address
This field contains the memory start address for Host Periodic TxFIFO.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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