EFM32WG Datasheet, PDF (633/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Bit
Name
Reset
Value
0
1
Mode
ALTEX
ACMP
10
ACMP1INV
0
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Access Description
Description
Alternative excitation is mapped to the LES_ALTEX pins.
Alternative excitation is mapped to the pins of the other ACMP.
RW
Invert analog comparator 1 output
9
ACMP0INV
0
RW
Invert analog comparator 0 output
8
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
7:6
SCANCONF
0x0
RW
Select scan configuration
These bits control which CHx_CONF registers to be used.
Value
0
1
2
3
Mode
DIRMAP
INVMAP
TOGGLE
DECDEF
Description
The channel configuration register registers used are directly mapped to the channel
number.
The channel configuration register registers used are CH_X+8_CONF for channels 0-7
and CH_X-8_CONF for channels 8-15.
The channel configuration register registers used toggles between CH_X_CONF and
CH_X+8_CONF when channel x triggers
The decoder state defines the CONF registers to be used.
5:2
PRSSEL
0x0
RW
Scan start PRS select
Select PRS source for scan start if SCANMODE is set to PRS.
Value
0
1
2
3
4
5
6
7
8
9
10
11
Mode
PRSCH0
PRSCH1
PRSCH2
PRSCH3
PRSCH4
PRSCH5
PRSCH6
PRSCH7
PRSCH8
PRSCH9
PRSCH10
PRSCH11
Description
PRS Channel 0 selected as input
PRS Channel 1 selected as input
PRS Channel 2 selected as input
PRS Channel 3 selected as input
PRS Channel 4 selected as input
PRS Channel 5 selected as input
PRS Channel 6 selected as input
PRS Channel 7 selected as input
PRS Channel 8 selected as input
PRS Channel 9 selected as input
PRS Channel 10 selected as input
PRS Channel 11 selected as input
1:0
SCANMODE
0x0
RW
Configure scan mode
These bits control how the scan frequency is decided
Value
0
1
2
Mode
PERIODIC
ONESHOT
PRS
Description
A new scan is started each time the period counter overflows
A single scan is performed when START in CMD is set
Pulse on PRS channel
25.5.2 LESENSE_TIMCTRL - Timing Control Register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
633
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