EFM32WG Datasheet, PDF (155/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Value
6
7
Mode
DIV64
DIV128
Reset
Access Description
Description
Voltage Boost update Frequency = LFACLK/64.
Voltage Boost update Frequency = LFACLK/128.
3
VBOOSTEN
0
RW
Voltage Boost Enable
This bit enables/disables the VBOOST function.
2:0
FDIV
0x0
RW
Frame Rate Control
These bits controls the framerate according to this formula: LFACLK_LCD = LFACLK_LCDpre / (1 + FDIV). Do not change this value while
the LCD bit in CMU_LFACLKEN0 is set to 1.
11.5.27 CMU_ROUTE - I/O Routing Register
Offset
0x080
Reset
Access
Bit Position
Name
Bit
Name
Reset
Access Description
31:5
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
4:2
LOCATION
0x0
RW
Decides the location of the CMU I/O pins.
I/O Location
Value
0
1
2
Mode
LOC0
LOC1
LOC2
Description
Location 0
Location 1
Location 2
1
CLKOUT1PEN
0
RW
CLKOUT1 Pin Enable
When set, the CLKOUT1 pin is enabled.
0
CLKOUT0PEN
0
RW
CLKOUT0 Pin Enable
When set, the CLKOUT0 pin is enabled.
11.5.28 CMU_LOCK - Configuration Lock Register
Offset
0x084
Bit Position
Reset
Access
Name
Bit
31:16
Name
Reserved
Reset
Access Description
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
155
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