EFM32WG Datasheet, PDF (82/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

...the world's most energy friendly microcontrollers
Bit
31:12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CH11ENC
0
W1
Channel 11 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH10ENC
0
W1
Channel 10 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH9ENC
0
W1
Channel 9 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH8ENC
0
W1
Channel 8 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH7ENC
0
W1
Channel 7 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH6ENC
0
W1
Channel 6 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH5ENC
0
W1
Channel 5 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH4ENC
0
W1
Channel 4 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH3ENC
0
W1
Channel 3 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH2ENC
0
W1
Channel 2 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH1ENC
0
W1
Channel 1 Enable Clear
Write to 1 to disable this channel. See also description for channel 0.
CH0ENC
0
W1
Channel 0 Enable Clear
Write to 1 to disable this channel. Note that the controller disables a channel, by setting the appropriate bit, when either it completes
the DMA cycle, or it reads a channel_cfg memory location which has cycle_ctrl = b000, or an ERROR occurs on the AHB-Lite bus.
8.7.13 DMA_CHALTS - Channel Alternate Set Register
Offset
0x030
Reset
Access
Bit Position
Name
Bit
31:12
11
10
9
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CH11ALTS
0
RW1
Channel 11 Alternate Structure Set
Write to 1 to select the alternate structure for this channel.
CH10ALTS
0
RW1
Channel 10 Alternate Structure Set
Write to 1 to select the alternate structure for this channel.
CH9ALTS
0
RW1
Channel 9 Alternate Structure Set
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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