EFM32WG Datasheet, PDF (640/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Bit
Name
Reset
Set bit X to enable channel X
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Access Description
25.5.8 LESENSE_SCANRES - Scan result register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
Offset
0x01C
Bit Position
Reset
Access
Name
Bit
31:16
15:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
SCANRES
0x0000
R
Scan results
Bit X will be set depending on channel X evaluation
25.5.9 LESENSE_STATUS - Status Register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
Offset
0x020
Reset
Access
Bit Position
Name
Bit
Name
31:6
Reserved
5
DACACTIVE
Reset
Access Description
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0
R
LESENSE DAC interface is active
4
SCANACTIVE
0
R
LESENSE is currently interfacing sensors.
3
RUNNING
0
R
LESENSE is active
2
BUFFULL
0
R
Set when the result buffer is full
1
BUFHALFFULL
0
R
Set when the result buffer is half full
Result buffer full
Result buffer half full
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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