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EFM32WG Datasheet, PDF (387/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
Offset
0x3C834
Reset
Access
Name
...the world's most energy friendly microcontrollers
Bit Position
Bit
31:16
15:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
DIEPEMPMSK
0x0000
RW
IN EP Tx FIFO Empty Interrupt Mask Bits
These bits acts as mask bits for USB_DIEP0INT.TXFEMP/USB_DIEPx_INT.TXFEMP interrupt. One bit per IN Endpoint: Bit 0 for
IN EP 0, bit 6 for IN EP 6.
15.6.50 USB_DIEP0CTL - Device IN Endpoint 0 Control Register
This section describes the Control IN Endpoint 0 Control register. Nonzero control endpoints use
registers for endpoints 1 - 6.
Offset
0x3C900
Reset
Bit Position
Access
Name
Bit
31
30
29:28
27
26
25:22
21
Name
Reset
Access Description
EPENA
0
RW1
Endpoint Enable
In DMA mode this bit indicates that data is ready to be transmitted on the endpoint. The core clears this bit before setting the following
interrupts on this endpoint: Endpoint Disabled, Transfer Completed.
EPDIS
0
RW1
Endpoint Disable
The application sets this bit to stop transmitting data on an endpoint, even before the transfer for that endpoint is complete. The
application must wait for the Endpoint Disabled interrupt before treating the endpoint as disabled. The core clears this bit before
setting the Endpoint Disabled Interrupt. The application must set this bit only if Endpoint Enable is already set for this endpoint.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
SNAK
0
W1
Set NAK
A write to this bit sets the NAK bit for the endpoint. Using this bit, the application can control the transmission of NAK handshakes
on an endpoint. The core can also set this bit for an endpoint after a SETUP packet is received on that endpoint.
CNAK
0
W1
Clear NAK
A write to this bit clears the NAK bit for the endpoint.
TXFNUM
0x0
RW
TxFIFO Number
This value is set to the FIFO number that is assigned to IN Endpoint 0.
STALL
0
RW1
Handshake
The application can only set this bit, and the core clears it, when a SETUP token is received for this endpoint. If a NAK bit, Global
Nonperiodic IN NAK, or Global OUT NAK is set along with this bit, the STALL bit takes priority.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
387
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