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Multiple LETIMER cycles are required to write a value to the LETIMER registers. The
example in Figure 23.10 (p. 589) assumes that writes are done in advance so they arrive
in the LETIMER as described in the figure.
Figure 23.11 (p. 590) shows an example where the LETIMER is started while LETIMERn_CNT is
nonzero. In this case the length of the first repetition is given by the value in LETIMERn_CNT.
Figure 23.11. LETIMER LETIMERn_CNT Not Initialized to 0
Initial configuration,
REP1 just writ t en
St op,
final values
TOP1 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3
TOP0 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3
CNT 4 3 2 1 0 2 1 0 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 0
REP0 3 3 3 3 3 2 2 2 1 1 1 3 3 3 3 2 2 2 2 1 1 1 1 0
REP1 3 3 3 3 3 3 3 3 3 3 3 3_u 3_u 3_u 3_u 3_u 3_u 3_u 3_u 3_u 3_u 3_u 3_u 3_u
Int. flags set
LFACLK_LETIMERn
LETn _O0
UFOA0 = 01
LETn _O1
UFOA0 = 10
UFIF
UFIF
UFIF
REP0 IF
UFIF
UFIF
UFIF
REP0 IF
23.3.5.3 PWM Output
Example 23.3. LETIMER PWM Output
There are several ways of generating PWM output with the LETIMER, but the most straight-forward way
is using the PWM output mode. This mode is enabled by setting UFOA0 or OFUA1 in LETIMERn_CTRL
to 3. In PWM mode, the output is set idle on timer underflow, and active on LETIMERn_COMP1 match,
so if for instance COMP0TOP = 1 and OPOL0 = 0 in LETIMERn_CTRL, LETIMERn_COMP0 determines
the PWM period, and LETIMERn_LETIMERn_COMP1 determines the active period.
The PWM period in PWM mode is LETIMERn_COMP0 + 1. There is no special handling of the case
where LETIMERn_COMP1 > LETIMERn_COMP0, so if LETIMERn_COMP1 > LETIMERn_COMP0, the
PWM output is given by the idle output value. This means that for OPOLx = 0 in LETIMERn_CTRL, the
PWM output will always be 0 for at least one clock cycle, and for OPOLx = 1 LETIMERn_CTRL, the
PWM output will always be 1 for at least one clock cycle.
To generate a PWM signal using the full PWM range, invert OPOLx when LETIMERn_COMP1 is set
to a value larger than LETIMERn_COMP0.
23.3.5.4 Interrupts
Example 23.4. LETIMER PWM Output
The interrupts generated by the LETIMER are combined into one interrupt vector. If the interrupt for the
LETIMER is enabled, an interrupt will be made if one or more of the interrupt flags in LETIMERn_IF and
their corresponding bits in LETIMER_IEN are set.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
590
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