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EFM32WG Datasheet, PDF (794/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
...the world's most energy friendly microcontrollers
Low Energy Mode and thus saving power consumption. The animation feature is available on 8 segments
multiplexed with LCD_COM0. The 8 segments can be either segments 0 to 7 or 8 to 15, depending on
ALOC in LCD_BACTRL. The animation is implemented as two programmable 8 bits registers that are
shifted left or right every other Animation state for a total of 16 states.
The shift operations applied to the shift registers are controlled by AREGASC and AREGBSC in
LCD_BACTRL as shown in the table below. Note also that the FC must be on for animation to work, as
it is the FC event that drives the animation state machine.
Table 33.13. LCD Animation Shift Register
AREGnSC, n = A
or B
00
01
Mode
NOSHIFT
SHIFTLEFT
10
SHIFTRIGHT
11
Reserved
Description
No Shift operation
Animation register is shifted left (LCD_AREGA is shifted every odd state,
LCD_AREGB is shifted every even state)
Animation register is shifted right (LCD_AREGA is shifted every odd state,
LCD_AREGB is shifted every even state)
Reserved
The two registers are either OR’ed or AND’ed to achieve the displayed animation pattern. This is
controlled by ALOGSEL in LCD_BACTRL as shown in Table 33.14 (p. 794) . In addition, the regular
segment data SEGD0[7:0] / SEGD0[15:8] is OR’ed with the animation pattern to generate the resulting
output.
Table 33.14. LCD Animation Pattern
ALOGSEL
0
1
Mode
AND
OR
Description
LCD_AREGA and LCD_AREGB are AND’ed together
LCD_AREGA and LCD_AREGB are OR’ed together
Each state is displayed one CLKEVENT period, see Section 33.3.10 (p. 792) . By reading ASTATE in
LCD_STATUS, software can identify which state that is currently active in the state sequence. Note that
the shifting operation is performed on internal registers that are not accessible in SW (when reading
LCD_AREGA and LCD_AREGB, the data that was original written will also be read back). The SW must
utilize the knowledge about the current state (ASTATE) to calculate what is currently output. ASTATE is
cleared when LCD_AREGA or LCD_AREGB are updated with new values. See Table 33.15 (p. 795)
for an example.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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