EFM32WG Datasheet, PDF (347/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Offset
0x3C994
0x3C998
0x3C9A0
0x3C9A8
0x3C9B0
0x3C9B4
0x3C9B8
0x3C9C0
0x3C9C8
0x3C9D0
0x3C9D4
0x3C9D8
0x3CB00
0x3CB08
0x3CB10
0x3CB14
0x3CB20
0x3CB28
0x3CB30
0x3CB34
0x3CB40
0x3CB48
0x3CB50
0x3CB54
0x3CB60
0x3CB68
0x3CB70
0x3CB74
0x3CB80
0x3CB88
0x3CB90
0x3CB94
0x3CBA0
0x3CBA8
0x3CBB0
0x3CBB4
0x3CBC0
0x3CBC8
0x3CBD0
0x3CBD4
0x3CE00
0x3D000
Name
USB_DIEP3_DMAADDR
USB_DIEP3_TXFSTS
USB_DIEP4_CTL
USB_DIEP4_INT
USB_DIEP4_TSIZ
USB_DIEP4_DMAADDR
USB_DIEP4_TXFSTS
USB_DIEP5_CTL
USB_DIEP5_INT
USB_DIEP5_TSIZ
USB_DIEP5_DMAADDR
USB_DIEP5_TXFSTS
USB_DOEP0CTL
USB_DOEP0INT
USB_DOEP0TSIZ
USB_DOEP0DMAADDR
USB_DOEP0_CTL
USB_DOEP0_INT
USB_DOEP0_TSIZ
USB_DOEP0_DMAADDR
USB_DOEP1_CTL
USB_DOEP1_INT
USB_DOEP1_TSIZ
USB_DOEP1_DMAADDR
USB_DOEP2_CTL
USB_DOEP2_INT
USB_DOEP2_TSIZ
USB_DOEP2_DMAADDR
USB_DOEP3_CTL
USB_DOEP3_INT
USB_DOEP3_TSIZ
USB_DOEP3_DMAADDR
USB_DOEP4_CTL
USB_DOEP4_INT
USB_DOEP4_TSIZ
USB_DOEP4_DMAADDR
USB_DOEP5_CTL
USB_DOEP5_INT
USB_DOEP5_TSIZ
USB_DOEP5_DMAADDR
USB_PCGCCTL
USB_FIFO0D0
...the world's most energy friendly microcontrollers
Type
RW
R
RWH
RWH
RW
RW
R
RWH
RWH
RW
RW
R
RWH
RW1
RW
RW
RWH
RW1
RWH
RW
RWH
RW1
RWH
RW
RWH
RW1
RWH
RW
RWH
RW1
RWH
RW
RWH
RW1
RWH
RW
RWH
RW1
RWH
RW
RWH
RW
Description
Device IN Endpoint x+1 DMA Address Register
Device IN Endpoint x+1 Transmit FIFO Status Register
Device IN Endpoint x+1 Control Register
Device IN Endpoint x+1 Interrupt Register
Device IN Endpoint x+1 Transfer Size Register
Device IN Endpoint x+1 DMA Address Register
Device IN Endpoint x+1 Transmit FIFO Status Register
Device IN Endpoint x+1 Control Register
Device IN Endpoint x+1 Interrupt Register
Device IN Endpoint x+1 Transfer Size Register
Device IN Endpoint x+1 DMA Address Register
Device IN Endpoint x+1 Transmit FIFO Status Register
Device OUT Endpoint 0 Control Register
Device OUT Endpoint 0 Interrupt Register
Device OUT Endpoint 0 Transfer Size Register
Device OUT Endpoint 0 DMA Address Register
Device OUT Endpoint x+1 Control Register
Device OUT Endpoint x+1 Interrupt Register
Device OUT Endpoint x+1 Transfer Size Register
Device OUT Endpoint x+1 DMA Address Register
Device OUT Endpoint x+1 Control Register
Device OUT Endpoint x+1 Interrupt Register
Device OUT Endpoint x+1 Transfer Size Register
Device OUT Endpoint x+1 DMA Address Register
Device OUT Endpoint x+1 Control Register
Device OUT Endpoint x+1 Interrupt Register
Device OUT Endpoint x+1 Transfer Size Register
Device OUT Endpoint x+1 DMA Address Register
Device OUT Endpoint x+1 Control Register
Device OUT Endpoint x+1 Interrupt Register
Device OUT Endpoint x+1 Transfer Size Register
Device OUT Endpoint x+1 DMA Address Register
Device OUT Endpoint x+1 Control Register
Device OUT Endpoint x+1 Interrupt Register
Device OUT Endpoint x+1 Transfer Size Register
Device OUT Endpoint x+1 DMA Address Register
Device OUT Endpoint x+1 Control Register
Device OUT Endpoint x+1 Interrupt Register
Device OUT Endpoint x+1 Transfer Size Register
Device OUT Endpoint x+1 DMA Address Register
Power and Clock Gating Control Register
Device EP 0/Host Channel 0 FIFO
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
347
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