EFM32WG Datasheet, PDF (127/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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HFRCO is selected. In most applications, one of the high frequency oscillators will be the preferred
choice. To change the selected HFCLK write to HFCLKSEL in CMU_CMD. The HFCLK is running in
EM0 and EM1.
HFCLK can optionally be divided down by setting HFCLKDIV in CMU_CTRL to a nonzero value. This
divides down HFCLK to all high frequency components except the USB Core and is typically used to
save energy in USB applications where the system is not required to run at 48 MHz. Combined with the
HFCORECLK and HFPERCLK prescalers the HFCLK divider also allows for more flexible clock division.
11.3.1.2 HFCORECLK - High Frequency Core Clock
HFCORECLK is a prescaled version of HFCLK. This clock drives the Core Modules, which consists of
the CPU and modules that are tightly coupled to the CPU, e.g. MSC, DMA etc. This also includes the
interface to the Low Energy Peripherals. Some of the modules that are driven by this clock can be clock
gated completely when not in use. This is done by clearing the clock enable bit for the specific module
in CMU_HFCORECLKEN0. The frequency of HFCORECLK is set using the CMU_HFCORECLKDIV
register. The setting can be changed dynamically and the new setting takes effect immediately.
The USB Core clock (USBC) is always undivided regardless of the HFCLKDIV setting. When the USB
Core is active this clock must be switched to a 32 kHz clock (LFRCO or LFXO) when entering EM2. The
USB Core uses this clock for monitoring the USB bus. The switch is done by writing USBCCLKSEL in
CMU_CMD. The currently active clock can be checked by reading CMU_STATUS. The clock switch can
take up to 1.5 32 kHz cycle (45 us). To avoid polling the clock selection status when switching switching
from 32 kHz to HFCLK when coming up from EM2 the USBCHFCLKSEL interrupt can be used. EM3
is not supported when the USB is active.
Note
Note that if HFPERCLK runs faster than HFCORECLK, the number of clock cycles for each
bus-access to peripheral modules will increase with the ratio between the clocks. Please
refer to Section 5.2.3.2 (p. 21) for more details.
11.3.1.3 HFPERCLK - High Frequency Peripheral Clock
Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This clock drives the
High-Frequency Peripherals. All the peripherals that are driven by this clock can be clock gated
completely when not in use. This is done by clearing the clock enable bit for the specific peripheral in
CMU_HFPERCLKEN0. The frequency of HFPERCLK is set using the CMU_HFPERCLKDIV register.
The setting can be changed dynamically and the new setting takes effect immediately.
Note
Note that if HFPERCLK runs faster than HFCORECLK, the number of clock cycles for each
bus-access to peripheral modules will increase with the ratio between the clocks. E.g. if a
bus-access normally takes three cycles, it will take 9 cycles if HFPERCLK runs three times
as fast as the HFCORECLK.
11.3.1.4 LFACLK - Low Frequency A Clock
LFACLK is the selected clock for the Low Energy A Peripherals. There are four selectable sources for
LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. In addition, the LFACLK can be disabled. From
reset, the LFACLK source is set to LFRCO. However, note that the LFRCO is disabled from reset. The
selection is configured using the LFA field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the
Low Energy A Peripherals to be used as high-frequency peripherals.
Note
If HFCORECLK/2 is selected as LFACLK, the clock will stop in EM2/3.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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