EFM32WG Datasheet, PDF (384/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Offset
0x3C818
Reset
Access
Name
...the world's most energy friendly microcontrollers
Bit Position
Bit
31:23
22
21
20
19
18
17
16
15:7
6
5
4
3
2
1
0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
OUTEPINT6
0
R
OUT Endpoint 6 Interrupt Bit
This bit is set when on or more of the interrupt flags in USB_DOEP5_INT are set.
OUTEPINT5
0
R
OUT Endpoint 5 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DOEP4_INT are set.
OUTEPINT4
0
R
OUT Endpoint 4 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DOEP3_INT are set.
OUTEPINT3
0
R
OUT Endpoint 3 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DOEP2_INT are set.
OUTEPINT2
0
R
OUT Endpoint 2 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DOEP1_INT are set.
OUTEPINT1
0
R
OUT Endpoint 1 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DOEP0_INT are set.
OUTEPINT0
0
R
OUT Endpoint 0 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DOEP0INT are set.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
INEPINT6
0
R
IN Endpoint 6 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP5_INT are set.
INEPINT5
0
R
IN Endpoint 5 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP4_INT are set.
INEPINT4
0
R
IN Endpoint 4 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP3_INT are set.
INEPINT3
0
R
IN Endpoint 3 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP2_INT are set.
INEPINT2
0
R
IN Endpoint 2 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP1_INT are set.
INEPINT1
0
R
IN Endpoint 1 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP0_INT are set.
INEPINT0
0
R
IN Endpoint 0 Interrupt Bit
This bit is set when one or more of the interrupt flags in USB_DIEP0INT are set.
15.6.46 USB_DAINTMSK - Device All Endpoints Interrupt Mask Register
The Device Endpoint Interrupt Mask register works with the Device Endpoint Interrupt register to interrupt
the application when an event occurs on a device endpoint. However, the Device All Endpoints Interrupt
(USB_DAINT) register bit corresponding to that interrupt is still set.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
384
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