EFM32WG Datasheet, PDF (561/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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21.5.2 RTC_CNT - Counter Value Register
Offset
0x004
Bit Position
Reset
Access
Name
Bit
31:24
23:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CNT
0x000000
RWH
Counter Value
Gives access to the counter value of the RTC.
21.5.3 RTC_COMP0 - Compare Value Register 0 (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
Offset
0x008
Bit Position
Reset
Access
Name
Bit
31:24
23:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
COMP0
0x000000
RW
Compare Value 0
A compare match event occurs when CNT is equal to this value. This event sets the COMP0 interrupt flag, and can be used to start
the LETIMER. It is also available as a PRS signal.
21.5.4 RTC_COMP1 - Compare Value Register 1 (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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