EFM32WG Datasheet, PDF (264/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Figure 15.14. Interrupt Service Routine for Bulk/Control OUT Transaction in DMA Mode
St art
Unm asked t he required
USB_HAINTMSK and
USB_HCx_INTMSK st at us
bits
No
In t er r u p t
?
yes
Read USB_HAINT t o
determine the channel
which caused the
Interrupt and read the
corresponding USB_HCx_INT
No
Service based on t he
other interrupt status
bit s nam ely: AHBERR,
FRMOVRERR,
BBLERR and
DATATGLERR
USB_HCx _INT.
No
CHHLTD = 1 ?
USB_HCx _INT.
ACK = 1?
Yes
Yes,
USB_HCx_INT.XACTERR = 1
Yes,
USB_HCx_INT.STALL = 1 or
USB_HCx_INT.XFERCOMPL = 1
1. Reset Err_cnt
2. Deallocate
channel
Reset Err_cnt
USB_HCx_INT.NAK = 1
/
USB_HCx_INT.ACK = 1
No
Yes
Err_cnt =
Err_cnt + 1
1. Err_cnt = 1
2. Re-init ialize
channel
3. Reprogram
Buffer pointers
No
1. Reprogram
Buffer pointers
2. Re-init ialize
Ch a n n e l
Err_cnt = =
3?
Yes
Deallocate
Ch a n n e l
In Figure 15.14 (p. 264) that the Interrupt Service Routine is not required to handle NAK responses.
This is the difference of proposed flow with respect to current flow. Similar flow is applicable for Control
flow also.
The NAK status bits in USB_HCx_INT registers are updated. The application can unmask these
interrupts when it requires the core to generate an interrupt for NAK. The NAK status is updated because
during Xact_err scenarios, this status provides a means for the application to determine whether the
Xact_err occurred three times consecutively or there were NAK responses in between two Xact_err.
This provides a mechanism for the application to reset the error counter accordingly. The application
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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