EFM32WG Datasheet, PDF (426/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Figure 16.11. I²C Slave State Machine
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0/1
Idle/busy
Slave t ransm it t er
73
S
ADDR R
A
Bus state/event
Transm it t ed by self
Received from m ast er
Bus st at e (STATE)
Interrupt flag set
Int eract ion required. Clock-
stretching applied until
manual or automatic
interaction has been
perform ed
Go t o st at e
N
Slave receiver
71
ADDR W
A
N
D5
DATA
A
P
0
Sr
41
DD
N
Arb. lost
1
B1
DATA
A
N
P
0
Sr
41
X Arb. lost
1
16.3.9.2 Address Recognition
The I²C module provides automatic address recognition for 7-bit addresses. 10-bit address recognition is
not fully automatic, but can be assisted by the 7-bit address comparator as shown in Section 16.3.11 (p.
430) . Address recognition is supported in all energy modes (except EM4).
The slave address, i.e. the address which the I²C module should be addressed with, is defined in
the I2Cn_SADDR register. In addition to the address, a mask must be specified, telling the address
comparator which bits of an incoming address to compare with the address defined in I2Cn_SADDR.
The mask is defined in I2Cn_SADDRMASK, and for every zero in the mask, the corresponding bit in
the slave address is treated as a don’t-care.
An incoming address that fails address recognition is automatically replied to with a NACK. Since only
the bits defined by the mask are checked, a mask with a value 0x00 will result in all addresses being
accepted. A mask with a value 0x7F will only match the exact address defined in I2Cn_SADDR, while
a mask 0x70 will match all addresses where the three most significant bits in I2Cn_SADDR and the
incoming address are equal.
If GCAMEN in I2Cn_CTRL is set, the general call address is always accepted regardless of the result
of the address recognition. The start-byte, i.e. the general call address with the R/W bit set is ignored
unless it is included in the defined slave address.
When an address is accepted by the address comparator, the decision of whether to ACK or NACK the
address is passed to software.
16.3.9.3 Slave Transmitter
When SLAVE in I2Cn_CTRL is set, the RSTART interrupt flag in I2Cn_IF will be set when repeated
START conditions are detected. No interaction is required on this event however.
After a START or repeated START condition, the bus master will transmit an address along with an R/
W bit. If there is no room in the receive shift register for the address, the bus will be held by the slave
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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