EFM32WG Datasheet, PDF (626/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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25.3.9 ACMP interface
The ACMPs are used to measure the sensors, and have to be configured according to the application
in order for LESENSE to work properly. Depending on the configuration in the ACMP0MODE and
ACMP1MODE bit-fields in PERCTRL, LESENSE will take control of the positive input mux and the
Vdd scaling factor (VDDLEVEL) for ACMP0 and ACMP1. The remaining configuration of the analog
comparators are done in the ACMP register interface. It is recommended to set the MUXEN bit in
ACMPn_CTRL for the ACMPs used by LESENSE. Each channel has the possibility to control the value
of the Vdd scaling factor on the negative input of the ACMP, VDDLEVEL in ACMP_INPUTSEL. This is
done in the 6 LSBs of ACMPTHRES in CHx_INTERACT. LESENSE automatically controls the ACMP
mux to connect the correct channel.
25.3.10 ACMP and DAC duty cycling
By default, the analog comparators and DAC are shut down in between LESENSE scans to save energy.
If this is not wanted, WARMUPMODE in PERCTRL can be configured to prevent them from being shut
down.
Both the DAC and analog comparators rely on a bias module for correct operation. This bias module
has a low power mode which consumes less energy at the cost of reduced accuracy. BIASMODE in
BIASCTRL configures how the bias module is controlled by LESENSE. When set to DUTYCYCLE,
LESENSE will set the bias module in high accuracy mode whenever LESENSE is active, and keep it
in the low power mode otherwise. When BIASMODE is set to HIGHACC, the high accuracy mode is
always selected. When set to DONTTOUCH, LESENSE will not control the bias module.
25.3.11 DMA requests
LESENSE issues a DMA request when the result buffer is either full or half full, depending on the
configuration of BUFIDL in CTRL. The request is cleared when the buffer level drops below the threshold
defined in BUFIDL. A single DMA request is also set whenever there is unread data in the buffer. DMAWU
in CTRL configures at which buffer level LESENSE should wake-up the DMA when in EM2.
Note
The DMA controller should always fetch data from the BUFDATA register.
25.3.12 PRS output
LESENSE is an asynchronous PRS producer and has nineteen PRS outputs. The decoder has three
outputs and in addition, all bits in the SCANRES register are available as PRS outputs. For further
information on the decoder PRS output, refer to Section 25.3.6 (p. 622) .
25.3.13 RAM
LESENSE includes a RAM block used for storage of configuration and results. If LESENSE is not
used, this RAM block can be powered down eliminating its current consumption due to leakage. The
RAM is powered down by setting the RAM bit in the POWERDOWN register. Once the RAM has been
shut down it cannot be turned back on without a reset of the chip. Registers mapped to the RAM
include: STx_TCONFA, STx_TCONFB, BUFx_DATA, BUFDATA, CHx_TIMING, CHx_INTERACT, and
CHx_EVAL. These registers have unknown value out of reset and have to be initialized before use.
Note
Read-modify-write operations on uninitialized RAM register produces undefined values.
25.3.14 Application examples
25.3.14.1 Capacitive sense
Figure 25.10 (p. 627) illustrates how the EFM32WG can be configured to monitor four capacitive
buttons.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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