EFM32WG Datasheet, PDF (655/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Bit
Name
1
CH1PEN
0
CH0PEN
Reset
0
0
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Access
RW
Description
CH0 Pin Enable
RW
CH0 Pin Enable
25.5.23 LESENSE_POWERDOWN - LESENSE RAM power-down register
(Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
Offset
0x058
Reset
Access
Bit Position
Name
Bit
Name
Reset
Access Description
31:1
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0
RAM
0
RW
LESENSE RAM power-down
Shut off power to the LESENSE RAM. Once it is powered down, it cannot be powered up again
25.5.24 LESENSE_STx_TCONFA - State transition configuration A (Async
Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
Offset
0x200
Reset
Access
Bit Position
Name
Bit
31:19
18
17
16
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CHAIN
X
RW
Enable state descriptor chaining
When set, descriptor in the next location will also be evaluated
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
SETIF
X
RW
Set interrupt flag enable
Set interrupt flag when sensor state equals COMP
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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