EFM32WG Datasheet, PDF (143/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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11.5.11 CMU_LFCLKSEL - Low Frequency Clock Select Register
Offset
0x028
Reset
Access
Bit Position
Name
Bit
31:21
20
19:17
16
15:4
3:2
1:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
LFBE
0
RW
This bit redefines the meaning of the LFB field.
Clock Select for LFB Extended
Value
0
1
Mode
DISABLED
ULFRCO
Description
LFBCLK is disabled (when LFB = DISABLED).
ULFRCO selected as LFBCLK (when LFB = DISABLED).
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
LFAE
0
RW
This bit redefines the meaning of the LFA field.
Clock Select for LFA Extended
Value
0
1
Mode
DISABLED
ULFRCO
Description
LFACLK is disabled (when LFA = DISABLED).
ULFRCO selected as LFACLK (when LFA = DISABLED).
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
LFB
0x1
RW
Selects the clock source for LFBCLK.
Clock Select for LFB
LFB
LFBE
0
0
1
0
2
0
3
0
0
1
Mode
Disabled
LFRCO
LFXO
HFCORECLKLEDIV2
ULFRCO
Description
LFBCLK is disabled
LFRCO selected as LFBCLK
LFXO selected as LFBCLK
HFCORECLK_LE divided by two is selected as
LFBCLK
ULFRCO selected as LFBCLK
LFA
0x1
RW
Selects the clock source for LFACLK.
Clock Select for LFA
LFA
LFAE
0
0
1
0
2
0
3
0
0
1
Mode
Disabled
LFRCO
LFXO
HFCORECLKLEDIV2
ULFRCO
Description
LFACLK is disabled
LFRCO selected as LFACLK
LFXO selected as LFACLK
HFCORECLK_LE divided by two is selected as
LFACLK
ULFRCO selected as LFACLK
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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