EFM32WG Datasheet, PDF (424/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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I2Cn_STATEDescription
I2Cn_IF
-
0x93
ADDR+R transmitted TXBL interrupt flag
(TXC interrupt flag)
ADDR+R transmitted, ACK interrupt
ACK received
flag(BUSHOLD)
0x9B
ADDR+R
transmitted,NACK
received
NACK(BUSHOLD)
0xB3
Data received
RXDATA interrupt
flag(BUSHOLD
interrupt flag)
-
Stop received
MSTOP interrupt flag
-
Arbitration lost
ARBLOST interrupt
flag
Required Response
interaction
STOP
STOP will be sent and bus released.
STOP + STOP will be sent and bus released. Then a
START START will be sent when bus becomes idle.
None
RXDATA Start receiving
STOP
STOP will be sent and the bus released
START Repeated START will be sent
STOP +
START
STOP will be sent and the bus released. Then
a START will be sent when the bus becomes
idle
CONT + Continue, start receiving
RXDATA
STOP
STOP will be sent and the bus released
START Repeated START will be sent
STOP +
START
STOP will be sent and the bus released. Then
a START will be sent when the bus becomes
idle
ACK +
ACK will be transmitted, reception continues
RXDATA
NACK +
CONT +
RXDATA
NACK will be transmitted, reception continues
ACK/
NACK +
STOP
ACK/NACK will be sent and the bus will be
released.
ACK/
NACK +
START
ACK/NACK will be sent, and then a repeated
start condition.
ACK/
NACK +
STOP +
START
ACK/NACK will be sent and the bus will be
released. Then a START will be sent when the
bus becomes idle
None
START START will be sent when bus becomes idle
None
START START will be sent when bus becomes idle
16.3.8 Bus States
The I2Cn_STATE register can be used to determine which state the I²C module and the I²C bus are in
at a given time. The register consists of the STATE bit-field, which shows which state the I²C module is
at in any ongoing transmission, and a set of single-bits, which reveal the transmission mode, whether
the bus is busy or idle, and whether the bus is held by this I²C module waiting for a software response.
The possible values of the STATE field are summarized in Table 16.6 (p. 425) . When this field is
cleared, the I²C module is not a part of any ongoing transmission. The remaining status bits in the
I2Cn_STATE register are listed in Table 16.7 (p. 425) .
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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