EFM32WG Datasheet, PDF (159/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

12.4 Register Map
...the world's most energy friendly microcontrollers
The offset register address is relative to the registers base address.
Offset
0x000
0x004
0x008
Name
WDOG_CTRL
WDOG_CMD
WDOG_SYNCBUSY
Type
RW
W1
R
Description
Control Register
Command Register
Synchronization Busy Register
12.5 Register Description
12.5.1 WDOG_CTRL - Control Register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 21) .
Offset
0x000
Reset
Access
Bit Position
Name
Bit
31:14
13:12
11:8
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CLKSEL
0x0
RW
Watchdog Clock Select
Selects the WDOG oscillator, i.e. the clock on which the watchdog will run.
Value
0
1
2
Mode
ULFRCO
LFRCO
LFXO
Description
ULFRCO
LFRCO
LFXO
PERSEL
0xF
Select watchdog timeout period.
RW
Watchdog Timeout Period Select
Value
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Description
Timeout period of 9 watchdog clock cycles.
Timeout period of 17 watchdog clock cycles.
Timeout period of 33 watchdog clock cycles.
Timeout period of 65 watchdog clock cycles.
Timeout period of 129 watchdog clock cycles.
Timeout period of 257 watchdog clock cycles.
Timeout period of 513 watchdog clock cycles.
Timeout period of 1k watchdog clock cycles.
Timeout period of 2k watchdog clock cycles.
Timeout period of 4k watchdog clock cycles.
Timeout period of 8k watchdog clock cycles.
Timeout period of 16k watchdog clock cycles.
Timeout period of 32k watchdog clock cycles.
Timeout period of 64k watchdog clock cycles.
Timeout period of 128k watchdog clock cycles.
Timeout period of 256k watchdog clock cycles.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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