EFM32WG Datasheet, PDF (141/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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11.5.8 CMU_CALCNT - Calibration Counter Register
Offset
0x01C
Bit Position
Reset
Access
Name
Bit
31:20
19:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CALCNT
0x00000
RWH
Calibration Counter
Write top value before calibration. Read calibration result from this register when Calibration Ready flag has been set.
11.5.9 CMU_OSCENCMD - Oscillator Enable/Disable Command Register
Offset
0x020
Reset
Access
Bit Position
Name
Bit
31:10
9
8
7
6
5
4
3
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
LFXODIS
0
W1
LFXO Disable
Disables the LFXO. LFXOEN has higher priority if written simultaneously.
LFXOEN
0
W1
LFXO Enable
Enables the LFXO.
LFRCODIS
0
W1
LFRCO Disable
Disables the LFRCO. LFRCOEN has higher priority if written simultaneously.
LFRCOEN
0
W1
LFRCO Enable
Enables the LFRCO.
AUXHFRCODIS
0
W1
AUXHFRCO Disable
Disables the AUXHFRCO. AUXHFRCOEN has higher priority if written simultaneously. WARNING: Do not disable this clock during
a flash erase/write operation.
AUXHFRCOEN
0
W1
AUXHFRCO Enable
Enables the AUXHFRCO.
HFXODIS
0
W1
HFXO Disable
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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