EFM32WG Datasheet, PDF (383/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Offset
0x3C814
Reset
Access
Name
...the world's most energy friendly microcontrollers
Bit Position
Bit
31:14
13
12
11:9
8
7
6
5
4
3
2
1
0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
NAKMSK
0
RW
NAK interrupt Mask
Set to 1 to unmask NAK Interrupt.
BBLEERRMSK
0
RW
Set to 1 to unmask BBLEERR Interrupt.
Babble Error interrupt Mask
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
OUTPKTERRMSK
0
RW
OUT Packet Error Mask
Set to 1 to unmask OUTPKTERR Interrupt.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
BACK2BACKSETUP
0
RW
Back-to-Back SETUP Packets Received Mask
Set to 1 to unmask BACK2BACKSETUP Interrupt. Applies to control OUT endpoints only.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
OUTTKNEPDISMSK
0
RW
OUT Token Received when Endpoint Disabled Mask
Set to 1 to unmask OUTTKNEPDIS Interrupt. Applies to control OUT endpoints only.
SETUPMSK
0
RW
SETUP Phase Done Mask
Set to 1 to unmask SETUP Interrupt. Applies to control endpoints only.
AHBERRMSK
0
RW
Set to 1 to unmask AHBERR Interrupt.
AHB Error
EPDISBLDMSK
0
RW
Endpoint Disabled Interrupt Mask
Set to 1 to unmask EPDISBLD Interrupt.
XFERCOMPLMSK
0
RW
Transfer Completed Interrupt Mask
Set to 1 to unmask XFERCOMPL Interrupt.
15.6.45 USB_DAINT - Device All Endpoints Interrupt Register
When a significant event occurs on an endpoint, a Device All Endpoints Interrupt register interrupts
the application using the Device OUT Endpoints Interrupt bit or Device IN Endpoints Interrupt bit of
the Core Interrupt register (USB_GINTSTS.OEPINT or USB_GINTSTS.IEPINT, respectively). There is
one interrupt bit per endpoint. For a bidirectional endpoint, the corresponding IN and OUT interrupt
bits are used. Bits in this register are set and cleared when the application sets and clears bits in the
corresponding Device Endpoint Interrupt register (USB_DIEP0INT/USB_DIEPx_INT, USB_DOEP0INT/
USB_DOEPx_INT).
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
383
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