EFM32WG Datasheet, PDF (546/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
31:16
15:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CNT
0x0000
RWH
Counter Value
These bits hold the counter value.
20.5.11 TIMERn_ROUTE - I/O Routing Register
Offset
0x028
Reset
Access
Bit Position
Name
Bit
31:19
18:16
15:11
10
9
8
7:3
2
1
0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
LOCATION
0x0
RW
Decides the location of the CC and CDTI pins.
I/O Location
Value
0
1
2
3
4
5
Mode
LOC0
LOC1
LOC2
LOC3
LOC4
LOC5
Description
Location 0
Location 1
Location 2
Location 3
Location 4
Location 5
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CDTI2PEN
0
RW
CC Channel 2 Complementary Dead-Time Insertion Pin Enable
Enable/disable CC channel 2 complementary dead-time insertion output connection to pin.
CDTI1PEN
0
RW
CC Channel 1 Complementary Dead-Time Insertion Pin Enable
Enable/disable CC channel 1 complementary dead-time insertion output connection to pin.
CDTI0PEN
0
RW
CC Channel 0 Complementary Dead-Time Insertion Pin Enable
Enable/disable CC channel 0 complementary dead-time insertion output connection to pin.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CC2PEN
0
RW
CC Channel 2 Pin Enable
Enable/disable CC channel 2 output/input connection to pin.
CC1PEN
0
RW
CC Channel 1 Pin Enable
Enable/disable CC channel 1 output/input connection to pin.
CC0PEN
0
RW
CC Channel 0 Pin Enable
Enable/disable CC Channel 0 output/input connection to pin.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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