EFM32WG Datasheet, PDF (418/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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The I²C-bus is considered busy whenever another device on the bus transmits a START condition. Until
a STOP condition is detected, the bus is owned by the master issuing the START condition. The bus is
considered free when a STOP condition is transmitted on the bus. After a STOP is detected, all masters
that have data to transmit send a START condition and begin transmitting data. Arbitration ensures that
collisions are avoided.
When the START condition has been transmitted, the master must transmit a slave address (ADDR)
with an R/W bit on the bus. If this address is available in the transmit buffer, the master transmits it
immediately, but if the buffer is empty, the master holds the I²C-bus while waiting for software to write
the address to the transmit buffer.
After the address has been transmitted, a sequence of bytes can be read from or written to the slave,
depending on the value of the R/W bit (bit 0 in the address byte). If the bit was cleared, the master
has entered a master transmitter role, where it now transmits data to the slave. If the bit was set, it
has entered a master receiver role, where it now should receive data from the slave. In either case, an
unlimited number of bytes can be transferred in one direction during the transmission.
At the end of the transmission, the master either transmits a repeated START condition (Sr) if it wishes
to continue with another transfer, or transmits a STOP condition (P) if it wishes to release the bus.
16.3.7.1 Master State Machine
The master state machine is shown in Figure 16.10 (p. 419) . A master operation starts in the far
left of the state machine, and follows the solid lines through the state machine, ending the operation or
continuing with a new operation when arriving at the right side of the state machine.
Branches in the path through the state machine are the results of bus events and choices made by
software, either directly or indirectly. The dotted lines show where I²C-specific interrupt flags are set
along the path and the full-drawn circles show places where interaction may be required by software
to let the transmission proceed.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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