EFM32WG Datasheet, PDF (363/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
16:15
14:4
3:0
Name
Reset
Access Description
Value
1
2
3
4
5
6
7
Mode
GOUTNAK
PKTRCV
XFERCOMPL
SETUPCOMPL
TGLERR
SETUPRCV
CHLT
Description
Device mode: Global OUT NAK (triggers an interrupt).
Host mode: IN data packet received.
Device mode: OUT data packet received.
Host mode: IN transfer completed (triggers an interrupt).
Device mode: OUT transfer completed (triggers an interrupt).
Device mode: SETUP transaction completed (triggers an interrupt).
Host mode: Data toggle error (triggers an interrupt).
Device mode: SETUP data packet received.
Host mode: Channel halted (triggers an interrupt).
DPID
0x0
R
Data PID (host or device)
Host mode: Indicates the Data PID of the received packet. Device mode: Indicates the Data PID of the received OUT data packet.
Value
0
1
2
3
Mode
DATA0
DATA1
DATA2
MDATA
Description
DATA0 PID.
DATA1 PID.
DATA2 PID.
MDATA PID.
BCNT
0x000
R
Byte Count (host or device)
Host mode: Indicates the byte count of the received IN data packet.
Device mode: Indicates the byte count of the received data packet.
CHEPNUM
0x0
R
Channel Number (host only) / Endpoint Number (device only)
Host mode: Indicates the channel number to which the current received packet belongs.
Device mode: Indicates the endpoint number to which the current received packet belongs.
15.6.16 USB_GRXSTSP - Receive Status Read and Pop Register
A read to the Receive Status Read and Pop register returns the contents of the top of the Receive FIFO
and pops the top data entry out of the RxFIFO. The receive status contents must be interpreted differently
in Host and Device modes. The core ignores the receive status pop/read when the receive FIFO is empty
and returns a value of 0x00000000. The application must only pop the Receive Status FIFO when the
Receive FIFO Non-Empty bit of the Core Interrupt register (USB_GINTSTS.RXFLVL) is asserted.
Offset
0x3C020
Bit Position
Reset
Access
Name
Bit
31:25
24:21
20:17
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
FN
0x0
R
Frame Number (device only)
This is the least significant 4 bits of the Frame number in which the packet is received on the USB.
PKTSTS
0x0
R
Packet Status (host or device)
Indicates the status of the received packet.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
363
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