EFM32WG Datasheet, PDF (472/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
29
28
27:26
25
24
23
22
21
20
19
18
17
16
Name
Reset
Access Description
AUTOTX
0
RW
Always Transmit When RX Not Full
Transmits as long as RX is not full. If TX is empty, underflows are generated.
BYTESWAP
0
RW
Byteswap In Double Accesses
Set to switch the order of the bytes in double accesses.
Value
0
1
Description
Normal byte order
Byte order swapped
TXDELAY
0x0
RW
TX Delay Transmission
Configurable delay before new transfers. Frames sent back-to-back are not delayed.
Value
0
1
2
3
Mode
NONE
SINGLE
DOUBLE
TRIPLE
Description
Frames are transmitted immediately
Transmission of new frames are delayed by a single baud period
Transmission of new frames are delayed by two baud periods
Transmission of new frames are delayed by three baud periods
SSSEARLY
0
RW
Synchronous Slave Setup Early
Setup data on sample edge in synchronous slave mode to improve MOSI setup time.
ERRSTX
0
RW
Disable TX On Error
When set, the transmitter is disabled on framing and parity errors (asynchronous mode only) in the receiver.
Value
0
1
Description
Received framing and parity errors have no effect on transmitter
Received framing and parity errors disable the transmitter
ERRSRX
0
RW
Disable RX On Error
When set, the receiver is disabled on framing and parity errors (asynchronous mode only).
Value
0
1
Description
Framing and parity errors have no effect on receiver
Framing and parity errors disable the receiver
ERRSDMA
0
RW
Halt DMA On Error
When set, DMA requests will be cleared on framing and parity errors (asynchronous mode only).
Value
0
1
Description
Framing and parity errors have no effect on DMA requests from the USART
DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set
BIT8DV
0
RW
Bit 8 Default Value
The default value of the 9th bit. If 9-bit frames are used, and an 8-bit write operation is done, leaving the 9th bit unspecified, the
9th bit is set to the value of BIT8DV.
SKIPPERRF
0
RW
Skip Parity Error Frames
When set, the receiver discards frames with parity errors (asynchronous mode only). The PERR interrupt flag is still set.
SCRETRANS
0
RW
SmartCard Retransmit
When in SmartCard mode, a NACK'ed frame will be kept in the shift register and retransmitted if the transmitter is still enabled.
SCMODE
0
RW
SmartCard Mode
Use this bit to enable or disable SmartCard mode.
AUTOTRI
0
RW
Automatic TX Tristate
When enabled, TXTRI is set by hardware whenever the transmitter is idle, and TXTRI is cleared by hardware when transmission starts.
Value
0
1
Description
The output on U(S)n_TX when the transmitter is idle is defined by TXINV
U(S)n_TX is tristated whenever the transmitter is idle
AUTOCS
0
RW
Automatic Chip Select
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
472
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