EFM32WG Datasheet, PDF (221/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Bit
Name
Reset
Value
0
1
Mode
ACTIVELOW
ACTIVEHIGH
0
CSPOL
0
Sets the polarity of the EBI_CSn line.
Value
0
1
Mode
ACTIVELOW
ACTIVEHIGH
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Access Description
Description
REn and NANDREn are active low.
REn and NANDREn are active high.
RW
Chip Select Polarity
Description
CSn is active low.
CSn is active high.
14.5.15 EBI_ADDRTIMING3 - Address Timing Register 3
Offset
0x038
Reset
Access
Bit Position
Name
Bit
31:29
28
27:10
9:8
7:2
1:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
HALFALE
0
RW
Half Cycle ALE Strobe Duration Enable
Enables or disables half cycle duration of the ALE strobe in the last address setup cycle.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
ADDRHOLD
0x3
RW
Address Hold Time
Sets the number of cycles the address is held after ALE is asserted.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
ADDRSETUP
0x3
RW
Address Setup Time
Sets the number of cycles the address is driven onto the ADDRDAT bus before ALE is asserted. If set to 0, 1 cycle is inserted by HW.
14.5.16 EBI_RDTIMING3 - Read Timing Register 3
Offset
0x03C
Reset
Access
Bit Position
Name
Bit
Name
31
Reserved
Reset
Access Description
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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