EFM32WG Datasheet, PDF (463/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Communication starts whenever there is data in the transmit buffer and the transmitter is enabled. The
USART clock then starts, and the master shifts bits out from the transmit shift register using the internal
clock.
When there are no more frames in the transmit buffer and the transmit shift register is empty, the clock
stops, and communication ends. When the receiver is enabled, it samples data using the internal clock
when the transmitter transmits data. Operation of the RX and TX buffers is as in asynchronous mode.
17.3.3.3.1 Operation of USn_CS Pin
When operating in master mode, the USn_CS pin can have one of two functions, or it can be disabled.
If USn_CS is configured as an output, it can be used to automatically generate a chip select for a slave
by setting AUTOCS in USARTn_CTRL. If AUTOCS is set, USn_CS is activated when a transmission
begins, and deactivated directly after the last bit has been transmitted and there is no more data in the
transmit buffer. By default, USn_CS is active low, but its polarity can be inverted by setting CSINV in
USARTn_CTRL.
When USn_CS is configured as an input, it can be used by another master that wants control of the bus
to make the USART release it. When USn_CS is driven low, or high if CSINV is set, the interrupt flag
SSM in USARTn_IF is set, and if CSMA in USARTn_CTRL is set, the USART goes to slave mode.
17.3.3.3.2 AUTOTX
A synchronous master is required to transmit data to a slave in order to receive data from the slave. In
some cases, only a few words are transmitted and a lot of data is then received from the slave. In that
case, one solution is to keep feeding the TX with data to transmit, but that consumes system bandwidth.
Instead AUTOTX can be used.
When AUTOTX in USARTn_CTRL is set, the USART transmits data as long as there is available space
in the RX shift register for the chosen frame size. This happens even though there is no data in the TX
buffer. The TX underflow interrupt flag TXUF in USARTn_IF is set on the first word that is transmitted
which does not contain valid data.
During AUTOTX the USART will always send the previous sent bit, thus reducing the number of
transitions on the TX output. So if the last bit sent was a 0, 0's will be sent during AUTOTX and if the
last bit sent was a 1, 1's will be sent during AUTOTX.
17.3.3.3.3 Synchronous Master Sample Delay
To improve speed in certain conditions by reducing the setup-time requirements for the SPI slave, the
master can be configured to sample the data one half SCLK-cycle later, i.e. on the next setup edge,
which, in SPI mode 0, is the rising edge. This is enabled by setting SMSDELAY in USARTn_CTRL and
can be used together with all SPI slaves that does not set up new data before the next setup edge, as
the propagation delay of SCLK will ensure sufficient hold time.
Note
If used together with another Energy Micro chip utilizing SSSEARLY, a very thorough
understanding of the timing is required.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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