EFM32WG Datasheet, PDF (133/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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11.3.4 Configuration For Operating Frequencies
The HFXO is capable of driving crystals up to 48 MHz, which allows the EFM32 to run at up to this
frequency. Different frequencies have different requirements as shown in Table 11.1 (p. 133) . Before
going to a high frequency, make sure the registers in the table have the correct values. When going
down in frequency, make sure to keep the registers at the values required by the higher frequency until
after the switch has been done.
Table 11.1. Configuration For Operating Frequencies
Maximum Frequency
16 MHz
32 MHz
48 MHz
MODE in MSC_READCTRL HFLE in CMU_CTRL
WS0 / WS0SCBTP / WS1 / -
WS1SCBTP / WS2 /
WS2SCBTP
WS1 / WS1SCBTP / WS2 / -
WS2SCBTP
WS2 / WS2SCBTP
1
HFXOBUFCUR in
CMU_CTRL
BOOSTUPTO32MHZ
(default value)
BOOSTUPTO32MHZ
(default value)
BOOSTABOVE32MHZ
MODE in MSC_READCTRL makes sure the flash is able to operate at the given frequencies
by inserting waitstates for flash accesses. HFXOBUFCUR in CMU_CTRL should be set to
BOOSTABOVE32MHZ when operating above 32 MHz. When operating at 32 MHz or below, the
default value (BOOSTUPTO32MHZ) should be used. HFLE in CMU_CTRL is only required for
frequencies above 32 MHz, and ensures correct operation of LE peripherals. This register also
implies HFCORECLKLEDIV in CMU_HFCORECLKDIV set to DIV4, reducing the frequency of
CMU_HFCORECLKLEDIV2.
11.3.5 Output Clock on a Pin
It is possible to configure the CMU to output clocks on two pins. This clock selection is done using
CLKOUTSEL0 and CLKOUTSEL1 fields in CMU_CTRL. The output pins must be configured in the
CMU_ROUTE register.
• LFRCO, LFXO, HFCLK or the qualified clock from any of the oscillators can be output on one pin
(CMU_OUT1). A qualified clock will not have any glitches or skewed duty-cycle during startup. For
LFXO and HFXO you need to configure LFXOTIMEOUT and HFXOTIMEOUT in CMU_CTRL correctly
to guarantee a qualified clock.
• HFRCO, HFXO, HFCLK/2, HFCLK/4, HFCLK/8, HFCLK/16, ULFRCO or AUXHFRCO can be output
on another pin (CMU_OUT0)
Note that HFXO and HFRCO clock outputs to pin can be unstable after startup and should not be output
on a pin before HFXORDY/HFRCORDY is set high in CMU_STATUS.
11.3.6 Protection
It is possible to lock the control- and command registers to prevent unintended software writes to critical
clock settings. This is controlled by the CMU_LOCK register.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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