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EFM32WG Datasheet, PDF (196/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
...the world's most energy friendly microcontrollers
EXTERNAL. The RGB interface consists of 8 or 16 data lines on EBI_AD together with the EBI_DATAEN,
EBI_VSYNC, EBI_HSYNC and EBI_DCLK control signals. EBI_TFTCSn indicates whether the DD
bitfield is programmed to DISABLED or not. Whether Direct Drive is active or not can also be read via
the DDACT status bit in the EBI_STATUS register.
The dimensions of the visible display are defined in the VSZ and HSZ bitfields of the EBI_TFTSIZE
register. Hardware automatically adds 1 to the size programmed in these bitfields. The front and back
porch sizes are defined in the HFPORCH, HBPORCH, VFPORCH and VBPORCH bitfields of the
EBI_TFTHPORCH and EBI_TFTVPORCH registers. The porch and visible display sizes define the
number of EBI_DCLK pulses per line and the number of lines per frame according to Equation 14.1 (p.
196) and Equation 14.2 (p. 196) respectively.
EBI TFT Total Width
Number of EBI_DCLK pulses per line = HBPORCH + (HSZ + 1) + HFPORCH
(14.1)
EBI TFT Total Height
Number of lines per frame = VBPORCH + (VSZ + 1) + VFPORCH
(14.2)
The horizontal and vertical synchronization pulses begin at the starts of the horizontal and vertical
back porch intervals respectively. For the HSYNC pulse a delayed start position can be defined in the
HSYNCSTART bitfield of the EBI_TFTHPORCH register. The end of the HSYNC pulse is not delayed
and therefore the HSYNC pulse width is shortened when using a non-zero HSYNCSTART. The widths,
or rather end positions, of the HSYNC and VSYNC synchronization pulses are defined in the HSYNC
and VSYNC bitfields of the EBI_TFTSIZE register respectively. The horizontal synchronization pulse
width is specified in pixels. The vertical synchronization pulse width is specified in lines. Hardware
automatically adds 1 to the width programmed in these bitfields. The EBI_TFTSIZE bitfields are shown
in Figure 14.33 (p. 197) . When Direct Drive is enabled, the VCNT and HCNT bitfields in the
EBI_TFTSTATUS register show how the frame display progresses. VCNT is a counter containing the
current line position in a frame. It counts from 0 (first line in the vertical back porch) to VBPORCH + VSZ
+ VFPORCH (last line in the vertical front porch). HCNT is a counter containing the current pixel position
within a line. It counts from 0 (first pixel in the horizonal back porch) to HBPORCH + HSZ + HFPORCH
(last pixel in the horizontal front porch).
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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