EFM32WG Datasheet, PDF (513/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Reset
Access Description
Set when a multi-processor address frame is detected.
7
FERR
0
R
Framing Error Interrupt Flag
Set when a frame with a framing error is received while RXBLOCK is cleared.
6
PERR
0
R
Parity Error Interrupt Flag
Set when a frame with a parity error is received while RXBLOCK is cleared.
5
TXOF
0
R
TX Overflow Interrupt Flag
Set when a write is done to the transmit buffer while it is full. The data already in the transmit buffer is preserved.
4
RXUF
0
R
RX Underflow Interrupt Flag
Set when trying to read from the receive buffer when it is empty.
3
RXOF
0
R
RX Overflow Interrupt Flag
Set when data is incoming while the receive shift register is full. The data previously in shift register is overwritten by the new data.
2
RXDATAV
0
R
RX Data Valid Interrupt Flag
Set when data becomes available in the receive buffer.
1
TXBL
1
R
TX Buffer Level Interrupt Flag
Set when space becomes available in the transmit buffer for a new frame.
0
TXC
0
R
TX Complete Interrupt Flag
Set after a transmission when both the TX buffer and shift register are empty.
19.5.13 LEUARTn_IFS - Interrupt Flag Set Register
Offset
0x030
Reset
Access
Bit Position
Name
Bit
31:11
10
9
8
7
6
5
4
3
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
SIGF
0
W1
Set Signal Frame Interrupt Flag
Write to 1 to set the SIGF interrupt flag.
STARTF
0
W1
Set Start Frame Interrupt Flag
Write to 1 to set the STARTF interrupt flag.
MPAF
0
W1
Set Multi-Processor Address Frame Interrupt Flag
Write to 1 to set the MPAF interrupt flag.
FERR
0
W1
Set Framing Error Interrupt Flag
Write to 1 to set the FERR interrupt flag.
PERR
0
W1
Set Parity Error Interrupt Flag
Write to 1 to set the PERR interrupt flag.
TXOF
0
W1
Set TX Overflow Interrupt Flag
Write to 1 to set the TXOF interrupt flag.
RXUF
0
W1
Set RX Underflow Interrupt Flag
Write to 1 to set the RXUF interrupt flag.
RXOF
0
W1
Set RX Overflow Interrupt Flag
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
513
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