EFM32WG Datasheet, PDF (388/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
20
19:18
17
16
15
14:2
1:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
EPTYPE
0x0
R
Endpoint Type
Hardcoded to 0. Endpoint 0 is always a control endpoint.
NAKSTS
0
R
NAK Status
When this bit is 0 the core is transmitting non-NAK handshakes based on the FIFO status. When this bit is 1 the core is transmitting
NAK handshakes on this endpoint. When this bit is set, either by the application or core, the core stops transmitting data, even if
there is data available in the TxFIFO. Irrespective of this bit's setting, the core always responds to SETUP data packets with an
ACK handshake.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
USBACTEP
1
R
USB Active Endpoint
This bit is always 1, indicating that control endpoint 0 is always active in all configurations and interfaces.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
MPS
0x0
RW
Maximum Packet Size
The application must program this field with the maximum packet size for the current logical endpoint.
Value
0
1
2
3
Mode
64B
32B
16B
8B
Description
64 bytes.
32 bytes.
16 bytes.
8 bytes.
15.6.51 USB_DIEP0INT - Device IN Endpoint 0 Interrupt Register
This register indicates the status of endpoint 0 with respect to USB- and AHB-related events. The
application must read this register when the IN Endpoints Interrupt bit of the Core Interrupt register
(USB_GINTSTS.IEPINT) is set. Before the application can read this register, it must first read the Device
All Endpoints Interrupt (USB_DAINT) register to get the exact endpoint number for the Device Endpoint
Interrupt register. The application must clear the appropriate bit in this register to clear the corresponding
bits in the USB_DAINT and USB_GINTSTS registers.
Offset
0x3C908
Reset
Access
Bit Position
Name
Bit
31:14
13
12
11
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
NAKINTRPT
0
RW1
NAK Interrupt
The core generates this interrupt when a NAK is transmitted or received by the device. In case of isochronous IN endpoints the
interrupt gets generated when a zero length packet is transmitted due to un-availability of data in the TXFifo.
BBLEERR
0
RW1
NAK Interrupt
The core generates this interrupt when babble is received for the endpoint.
PKTDRPSTS
0
RW1
Packet Drop Status
This bit indicates to the application that an ISO OUT packet has been dropped. This bit does not have an associated mask bit and
does not generate an interrupt.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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