EFM32WG Datasheet, PDF (378/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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15.6.38 USB_HCx_TSIZ - Host Channel x Transfer Size Register
Offset
0x3C510
Bit Position
Reset
Access
Name
Bit
31
30:29
28:19
18:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
PID
0x0
RW
Packet ID
The application programs this field with the packet ID type to use for the initial transaction. The host maintains this field for the rest
of the transfer.
Value
0
1
2
3
Mode
DATA0
DATA2
DATA1
MDATA
Description
DATA0 PID.
DATA2 PID.
DATA1 PID.
MDATA (non-control) / SETUP (control) PID.
PKTCNT
0x000
RW
Packet Count
This field is programmed by the application with the expected number of packets to be transmitted (OUT) or received (IN). The
host decrements this count on every successful transmission or reception of an OUT/IN packet. Once this count reaches zero, the
application is interrupted to indicate normal completion.
XFERSIZE
0x00000
RW
Transfer Size
For an OUT, this field is the number of data bytes the host sends during the transfer. For an IN, this field is the buffer size that the
application has reserved for the transfer. The application is expected to program this field as an integer multiple of the maximum
packet size for IN transactions (periodic and non-periodic).
15.6.39 USB_HCx_DMAADDR - Host Channel x DMA Address Register
This register is used by the OTG host in the internal DMA mode to maintain the current buffer pointer
for IN/OUT transactions. The starting DMA address must be DWORD-aligned.
Offset
0x3C514
Bit Position
Reset
Access
Name
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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