EFM32WG Datasheet, PDF (47/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Reset
Access Description
19:0
CACHEHITS
0x00000
R
Cache hits since last performance counter start command.
Use to measure cache performance for a particular code section.
7.5.15 MSC_CACHEMISSES - Cache Misses Performance Counter
Offset
0x048
Bit Position
Reset
Access
Name
Bit
31:20
19:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CACHEMISSES
0x00000
R
Cache misses since last performance counter start command.
Use to measure cache performance for a particular code section.
7.5.16 MSC_TIMEBASE - Flash Write and Erase Timebase
Offset
0x050
Reset
Access
Bit Position
Name
Bit
31:17
16
15:6
5:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
PERIOD
0
RW
Sets the timebase period
Decides whether TIMEBASE specifies the number of AUX cycles in 1 us or 5 us.
Value
0
1
Mode
1US
5US
Description
TIMEBASE period is 1 us.
TIMEBASE period is 5 us.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
BASE
0x10
RW
Timebase used by MSC to time flash writes and erases
Should be set to the number of AUX clock cycles-1 in 1.1 us if TBPERIOD is cleared, or the number of AUX clock cycles-1 in 5.5 us
if TBPERIOD is set. The value should be rounded up to make sure the number of clock cycles generate at least the specified time.
The resetvalue of the timebase matches a 14 MHz AUXHFRCO, which is the default frequency of the AUXHFRCO.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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