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EFM32WG Datasheet, PDF (677/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
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Bit
Name
Value
7
Reset
Mode
512CYCLES
Access Description
Description
512 HFPERCLK cycles
7:5
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
4
HYSTEN
0
Enable hysteresis.
RW
Hysteresis Enable
Value
0
1
Description
No hysteresis
+-20 mV hysteresis
3
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2
INACTVAL
0
RW
Inactive Value
Configure the output value when the comparator is inactive.
1
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0
EN
0
RW
Voltage Supply Comparator Enable
Enable/disable voltage supply comparator.
27.5.2 VCMP_INPUTSEL - Input Selection Register
Offset
0x004
Reset
Access
Bit Position
Name
Bit
Name
Reset
Access Description
31:9
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
8
LPREF
0
RW
Low Power Reference
Enable/disable low power mode for VDD and bandgap reference. When using this bit, always leave it as 0 during warm-up and then
set it to 1 if desired when the warm-up is done.
7:6
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
5:0
TRIGLEVEL
0x00
RW
Trigger Level
Select VDD trigger level. Vtrig = 1.667V+0.034V×TRIGLEVEL.
27.5.3 VCMP_STATUS - Status Register
Offset
0x008
Reset
Access
Bit Position
Name
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
677
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