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13.3.1 Asynchronous Mode
Many reflex signals can operate in two modes, synchronous or asynchronous. A synchronous reflex is
clocked on HFPERCLK, and can be used as an input to all reflex consumers, but since they require
HFPERCLK, they will not work in EM2/EM3.
Asynchronous reflexes are not clocked on HFPERCLK, and can be used even in EM2/EM3. There is
a limitation to reflexes operating in asynchronous mode though: they can only be used by a subset of
the reflex consumers, the ones marked with async support in Table 13.2 (p. 165) . Peripherals that
can produce asynchronous reflexes are marked with async support in Table 13.1 (p. 164) . To use
these reflexes asynchronously, set ASYNC in the CHCTRL register for the PRS channel selecting the
reflex signal.
Note
If a peripheral channel with ASYNC set is used in a consumer not supporting asynchronous
reflexes, the behaviour is undefined.
13.3.2 Channel Functions
Different functions can be applied to a reflex signal within the PRS. Each channel includes an edge
detector to enable generation of pulse signals from level signals. It is also possible to generate output
reflex signals by configuring the SWPULSE and SWLEVEL bits. SWLEVEL is a programmable level
for each channel and holds the value it is programmed to. The SWPULSE will give out a one-cycle
high pulse if it is written to 1, otherwise a 0 is asserted. The SWLEVEL and SWPULSE signals are
then XOR'ed with the selected input from the producers to form the output signal sent to the consumers
listening to the channel.
Note
The edge detector controlled by EDSEL should only be used when working with
synchronous reflexes, i.e., ASYNC in CHCTRL is cleared.
Figure 13.1. PRS Overview
SIGSEL[ 2:0]
SOURCESEL[ 5:0]
EDSEL[ 1:0]
SWPULSE[ n]
SWLEVEL[ n]
ASYNC[ n]
APB bus
Signals from
producer
peripherals
Reg
Signals t o
consum er
peripherals
13.3.3 Producers
Each PRS channel can choose between signals from several producers, which is configured in
SOURCESEL in PRS_CHx_CTRL. Each of these producers outputs one or more signals which can
be selected by setting the SIGSEL field in PRS_CHx_CTRL. Setting the SOURCESEL bits to 0 (Off)
leads to a constant 0 output from the input mux. An overview of the available producers is given in
Table 13.1 (p. 164) .
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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