EFM32WG Datasheet, PDF (808/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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33.5.20 LCD_FREEZE - Freeze Register
Offset
0x060
Reset
Access
Bit Position
Name
Bit
31:1
0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
REGFREEZE
0
RW
Register Update Freeze
When set, the update of the LCD is postponed until this bit is cleared. Use this bit to update several registers simultaneously.
Value
0
1
Mode
UPDATE
FREEZE
Description
Each write access to an LCD register is updated into the Low Frequency domain as
soon as possible.
The LCD is not updated with the new written value.
33.5.21 LCD_SYNCBUSY - Synchronization Busy Register
Offset
0x064
Reset
Access
Bit Position
Name
Bit
31:20
19
18
17
16
15
14
13
12
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
SEGD7L
0
R
SEGD7L Register Busy
Set when the value written to SEGD7L is being synchronized.
SEGD6L
0
R
SEGD6L Register Busy
Set when the value written to SEGD6L is being synchronized.
SEGD5L
0
R
SEGD5L Register Busy
Set when the value written to SEGD5L is being synchronized.
SEGD4L
0
R
SEGD4L Register Busy
Set when the value written to SEGD4L is being synchronized.
SEGD7H
0
R
SEGD7H Register Busy
Set when the value written to SEGD7H is being synchronized.
SEGD6H
0
R
SEGD6H Register Busy
Set when the value written to SEGD6H is being synchronized.
SEGD5H
0
R
SEGD5H Register Busy
Set when the value written to SEGD5H is being synchronized.
SEGD4H
0
R
SEGD4H Register Busy
Set when the value written to SEGD4H is being synchronized.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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