EFM32WG Datasheet, PDF (833/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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List of Equations
5.1. Memory SRAM Area Set/Clear Bit ............................................................................................................ 17
5.2. Memory Peripheral Area Bit Modification ................................................................................................... 17
5.3. Memory Wait Cycles with Clock Equal or Faster than HFCORECLK ............................................................... 21
5.4. Memory Wait Cycles with Clock Slower than CPU ....................................................................................... 21
12.1. WDOG Timeout Equation .................................................................................................................... 158
14.1. EBI TFT Total Width .......................................................................................................................... 196
14.2. EBI TFT Total Height ......................................................................................................................... 196
14.3. EBI Alpha Blending Equation ............................................................................................................... 201
14.4. EBI In-place Alpha Blending into External Memory ................................................................................... 202
14.5. EBI Alpha Blending into External Memory with Background Color1 from Register ........................................... 202
14.6. EBI Internal Alpha Blending from Registers into Register ........................................................................... 202
16.1. I²C Pull-up Resistor Equation ............................................................................................................... 412
16.2. I²C Maximum Transmission Rate .......................................................................................................... 416
16.3. I²C High and Low Cycles Equations ...................................................................................................... 416
17.1. USART Baud Rate ............................................................................................................................. 449
17.2. USART Desired Baud Rate ................................................................................................................. 449
17.3. USART Synchronous Mode Bit Rate ..................................................................................................... 461
17.4. USART Synchronous Mode Clock Division Factor .................................................................................... 462
19.1. LEUART Baud Rate Equation .............................................................................................................. 496
19.2. LEUART CLKDIV Equation .................................................................................................................. 496
19.3. LEUART Optimal Sampling Point .......................................................................................................... 499
19.4. LEUART Actual Sampling Point ............................................................................................................ 500
20.1. TIMER Rotational Position Equation ...................................................................................................... 525
20.2. TIMER Up-count Frequency Generation Equation .................................................................................... 529
20.3. TIMER Up-count PWM Resolution Equation ............................................................................................ 529
20.4. TIMER Up-count PWM Frequency Equation ............................................................................................ 530
20.5. TIMER Up-count Duty Cycle Equation ................................................................................................... 530
20.6. TIMER 2x PWM Resolution Equation .................................................................................................... 530
20.7. TIMER 2x Mode PWM Frequency Equation( Up-count) ............................................................................. 530
20.8. TIMER 2x Mode Duty Cycle Equation .................................................................................................... 530
20.9. TIMER Up/Down-count PWM Resolution Equation ................................................................................... 531
20.10. TIMER Up/Down-count PWM Frequency Equation .................................................................................. 531
20.11. TIMER Up/Down-count Duty Cycle Equation ......................................................................................... 531
20.12. TIMER 2x PWM Resolution Equation ................................................................................................... 532
20.13. TIMER 2x Mode PWM Frequency Equation( Up/Down-count) ................................................................... 532
20.14. TIMER 2x Mode Duty Cycle Equation .................................................................................................. 532
21.1. RTC Frequency Equation .................................................................................................................... 557
22.1. BURTC Frequency Equation ................................................................................................................ 566
22.2. Low power mode compare match resolution ........................................................................................... 567
23.1. LETIMER Clock Frequency .................................................................................................................. 585
24.1. Absolute position with hysteresis and even TOP value .............................................................................. 604
24.2. Absolute position with hysteresis and odd TOP value ............................................................................... 604
25.1. Scan frequency ................................................................................................................................. 619
26.1. V_DD Scaled ....................................................................................................................................... 664
27.1. VCMP V_DD Trigger Level .................................................................................................................... 674
28.1. ADC Total Conversion Time (in ADC_CLK cycles) Per Output .................................................................... 682
28.2. ADC Temperature Measurement .......................................................................................................... 685
29.1. DAC Clock Prescaling ........................................................................................................................ 706
29.2. DAC Single Ended Output Voltage ........................................................................................................ 707
29.3. DAC Differential Output Voltage ........................................................................................................... 707
29.4. DAC Sine Generation ......................................................................................................................... 708
33.1. LCD Frame rate Calculation ................................................................................................................ 791
33.2. LCD Event Frequency Equation ............................................................................................................ 792
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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