EFM32WG Datasheet, PDF (302/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

...the world's most energy friendly microcontrollers
2. When the core detects an end of periodic frame before transfer completion to all isochronous OUT
endpoints, it asserts the USB_GINTSTS.INCOMPLP (Incomplete Isochronous OUT data) interrupt,
indicating that a USB_DOEPx_INT.XFERCOMPL interrupt is not asserted on at least one of the
isochronous OUT endpoints. At this point, the endpoint with the incomplete transfer remains enabled,
but no active transfers remains in progress on this endpoint on the USB.
3. This step is applicable only if the core is operating in slave mode. Application Programming Sequence
4. This step is applicable only if the core is operating in slave mode. Asserting the
USB_GINTSTS.INCOMPLP (Incomplete Isochronous OUT data) interrupt indicates that in the current
frame, at least one isochronous OUT endpoint has an incomplete transfer.
5. If this occurs because isochronous OUT data is not completely emptied from the endpoint, the
application must ensure that the DMA or the application empties all isochronous OUT data (data and
status) from the receive FIFO before proceeding.
• When all data is emptied from the receive FIFO, the application can detect the
USB_DOEPx_INT.XFERCOMPL interrupt. In this case, the application must re-enable the endpoint
to receive isochronous OUT data in the next frame, as described in Control Read Transfers
(SETUP, Data IN, Status OUT) (p. 288) .
6. When it receives a USB_GINTSTS.incomplete Isochronous OUT data interrupt, the application must
read the control registers of all isochronous OUT endpoints (USB_DOEPx_CTL) to determine which
endpoints had an incomplete transfer in the current frame. An endpoint transfer is incomplete if both
the following conditions are met.
• USB_DOEPx_CTL.DPIDEOF (Even/Odd frame) = USB_DSTS.SOFFN[0]
• USB_DOEPx_CTL.EPENA (Endpoint Enable) = 1
7. The previous step must be performed before the USB_GINTSTS.SOF interrupt is detected, to ensure
that the current frame number is not changed.
8. For isochronous OUT endpoints with incomplete transfers, the application must discard the data in
the memory and disable the endpoint by setting the USB_DOEPx_CTL.EPDIS (Endpoint Disable) bit.
9. Wait for the USB_DOEPx_INT.EPDIS (Endpoint Disabled) interrupt and enable the endpoint to
receive new data in the next frame as explained in Control Read Transfers (SETUP, Data IN, Status
OUT) (p. 288) .
• Because the core can take some time to disable the endpoint, the application possibly is not able
to receive the data in the next frame after receiving bad isochronous data.
15.4.4.2.3 IN Data Transfers in Slave and DMA Modes
This section describes the internal data flow and application-level operations during IN data transfers.
• Packet Write in Slave Mode (p. 303)
• Setting Global Non-Periodic IN Endpoint NAK (p. 303)
• Setting IN Endpoint NAK (p. 303)
• IN Endpoint Disable (p. 304)
• Bulk IN Stall (p. 305)
• Incomplete Isochronous IN Data Transfers (p. 305)
• Stalling Non-Isochronous IN Endpoints (p. 306)
• Worst-Case Response Time (p. 307)
• Choosing the Value of USB_GUSBCFG.USBTRDTIM (p. 307)
• Handling Babble Conditions (p. 308)
• Generic Non-Periodic (Bulk and Control) IN Data Transfers Without Thresholding in DMA and Slave
Mode (p. 308)
• Examples (p. 310)
•
• Generic Periodic IN Data Transfers Without Thresholding Using the Periodic Transfer Interrupt
Feature (p. 315)
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
302
www.energymicro.com