EFM32WG Datasheet, PDF (753/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Figure 32.5. EM4 Wake-up Logic
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GPIO_EM4 W UCAUSE
GPIO_CMD
GPIO_EM4 W UPOL
GPIO_EM4 W UEN
Wake-up Logic
Wake-up request
The pins used for EM4 wake-up must be configured as inputs using the GPIO_Px_MODEL/
GPIO_Px_MODEH register. Before going down to EM4, it is important to clear the wake-up logic
by setting the EM4WUCLR bitfield in the GPIO_CMD register, which clears the complete wake-up
logic, including the GPIO_EM4WUCAUSE register. When the chip comes out of reset, it is possible
to determine what caused the reset by reading the RMU_RSTCAUSE register. If an em4 wake-up
reset occurred, the EM4RST (indicating the chip was in EM4) and the EM4WU (indicating the EM4
wake-up reset) bits should be set. It is possible to determine which pin caused the reset by reading
the GPIO_EM4WUCAUSE register. The mapping between pins and the bits in the GPIO_EM4WUEN,
GPIO_EM4WUPOL, and GPIO_EM4WUCAUSE registers are described in Table 32.2 (p. 753)
Table 32.2. EM4 WU Register bits to pin mapping
Wake-up Registers Bits
Pin
bit 0
A0
bit 1
A6
bit 2
C9
bit 3
F1
bit 4
F2
bit 5
E13
32.3.3 EM4 Retention
It is possible to enable retention of output enable, output value, pull enable and pull direction when
in EM4. EM4 retention also makes it possible to wake up from EM4 on pin reset as described in
Section 32.3.2 (p. 752) EM4 retention can be enabled by setting the EM4RET field in GPIO_CTRL
register before going down in EM4.
32.3.4 Alternate Functions
Alternate functions are connections to pins from Timers, USARTs etc. These modules contain route
registers, where the pin connections are enabled. In addition, these registers contain a location bit
field, which configures which pins the outputs of that module will be connected to if they are enabled.
If an alternate signal output is enabled for a pin and output is enabled for the pin, the alternate
function’s output data and output enable signals override the data output and output enable signals
from the GPIO. However, the pin configuration stays as set in GPIO_Px_MODEL, GPIO_Px_MODEH
and GPIO_Px_DOUT registers. I.e. the pin configuration must be set to output enable in GPIO for a
peripheral to be able to use the pin as an output.
It is possible, but not recommended to select two or more peripherals as output on the same pin. These
signals will then be OR'ed together. However, TIMER CCx and CDTIx outputs, which are routed as
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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