EFM32WG Datasheet, PDF (476/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Reset
Access Description
3:0
TSEL
0x0
RW
Trigger PRS Channel Select
Select USART PRS trigger channel. The PRS signal can enable RX and/or TX, depending on the setting of RXTEN and TXTEN.
Value
0
1
2
3
4
5
6
7
8
9
10
11
Mode
PRSCH0
PRSCH1
PRSCH2
PRSCH3
PRSCH4
PRSCH5
PRSCH6
PRSCH7
PRSCH8
PRSCH9
PRSCH10
PRSCH11
Description
PRS Channel 0 selected
PRS Channel 1 selected
PRS Channel 2 selected
PRS Channel 3 selected
PRS Channel 4 selected
PRS Channel 5 selected
PRS Channel 6 selected
PRS Channel 7 selected
PRS Channel 8 selected
PRS Channel 9 selected
PRS Channel 10 selected
PRS Channel 11 selected
17.5.4 USARTn_CMD - Command Register
Offset
0x00C
Reset
Access
Bit Position
Name
Bit
31:12
11
10
9
8
7
6
5
4
3
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CLEARRX
0
W1
Clear RX
Set to clear receive buffer and the RX shift register.
CLEARTX
0
W1
Clear TX
Set to clear transmit buffer and the TX shift register.
TXTRIDIS
0
W1
Transmitter Tristate Disable
Disables tristating of the transmitter output.
TXTRIEN
0
Tristates the transmitter output.
W1
Transmitter Tristate Enable
RXBLOCKDIS
0
W1
Receiver Block Disable
Set to clear RXBLOCK, resulting in all incoming frames being loaded into the receive buffer.
RXBLOCKEN
0
W1
Receiver Block Enable
Set to set RXBLOCK, resulting in all incoming frames being discarded.
MASTERDIS
0
W1
Master Disable
Set to disable master mode, clearing the MASTER status bit and putting the USART in slave mode.
MASTEREN
0
W1
Master Enable
Set to enable master mode, setting the MASTER status bit. Master mode should not be enabled while TXENS is set to 1. To enable
both master and TX mode, write MASTEREN before TXEN, or enable them both in the same write operation.
TXDIS
0
W1
Transmitter Disable
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
476
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