EFM32WG Datasheet, PDF (287/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Figure 15.19 (p. 287) charts this flow.
Figure 15.19. Processing a SETUP Packet
Wait for
USB_D OEPx _INT.SETUP
Back2Back Set up
No
Interrupt bit set ?
Yes
rem _supcnt =
Rd _Re g ( USB_D OEPx _TSIZ )
Set up_addr =
Rd _Re g ( USB_D OEPx _D MA
set up_cm d[ 31:0] = m em [ 4-2 * rem _supcnt ] set up_cm d[ 31:0] = m em [ set up_addr-8]
set up_cm d[ 63:32] = m em [ 5-2 * rem _supcnt ] set up_cm d[ 63:32] = m em [ set up_addr-4]
Find set up cm d t ype
Read
ctr-rd/wr/2 stage
Write
set up_np_in_pkt
Data IN phase
2- st age
set up_np_in_pkt
Sat a IN phase
rcv_out _pkt
Dat a OUT phase
15.4.4.2.1.2 Handling More Than Three Back-to-Back SETUP Packets
Per the USB 2.0 specification, normally, during a SETUP packet error, a host does not send more
than three back-to-back SETUP packets to the same endpoint. However, the USB 2.0 specification
does not limit the number of back-to-back SETUP packets a host can send to the same endpoint.
When this condition occurs, the core generates an interrupt (USB_DOEPx_INT.BACK2BACKSETUP).
In DMA mode, the core also rewinds the DMA address for that endpoint (USB_DOEPx_DMAADDR)
and overwrites the first SETUP packet in system memory with the fourth, second with the fifth, and so
on. If the BACK2BACKSETUP interrupt is asserted, the application must read the OUT endpoint DMA
register (USB_DOEPx_DMAADDR) to determine the final SETUP data in system memory.
In DMA mode, the application can mask the BACK2BACKSETUP interrupt, but after receiving the
DOEPINT.SETUP interrupt, the application can read the DOEPINT.BACK2BACKSETUP interrupt bit.
In Slave mode, the application can use the USB_GINTSTS.RXFLVL interrupt to read out the SETUP
packets from the FIFO whenever the core receives the SETUP packet.
15.4.4.2.2 Control Transfers
This section describes the various types of control transfers.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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