LAN9353 Datasheet, PDF (96/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
9.2.2 100BASE-TX TRANSMIT
The 100BASE-TX transmit data path is shown in Figure 9-2. Shaded blocks are those which are internal to the PHY.
Each major block is explained in the following sections.
FIGURE 9-2:
100BASE-TX TRANSMIT DATA PATH
Port x
MAC
Internal
MII Transmit Clock
100M
PLL
Internal
MII MAC
MII 25 MHz by 4 bits _Interface
25MHz
by 4 bits
4B/5B
Encoder
25MHz by
5 bits
Scrambler
and PISO
NRZI
Converter
NRZI
MLT-3
Converter
125 Mbps Serial
MLT-3
100M
TX Driver
MLT-3
Magnetics
MLT-3
RJ45
MLT-3
CAT-5
9.2.2.1 100BASE-TX Transmit Data Across the Internal MII Interface
For a transmission, the Switch Fabric MAC drives the transmit data onto the internal MII TXD bus and asserts the inter-
nal MII TXEN to indicate valid data. The data is in the form of 4-bit wide 25 MHz data.
9.2.2.2 4B/5B Encoder
The transmit data passes from the MII block to the 4B/5B Encoder. This block encodes the data from 4-bit nibbles to 5-
bit symbols (known as “code-groups”) according to Table 9-2. Each 4-bit data-nibble is mapped to 16 of the 32 possible
code-groups. The remaining 16 code-groups are either used for control information or are not valid.
The first 16 code-groups are referred to by the hexadecimal values of their corresponding data nibbles, 0 through F. The
remaining code-groups are given letter designations with slashes on either side. For example, an IDLE code-group is /
I/, a transmit error code-group is /H/, etc.
TABLE 9-2: 4B/5B CODE TABLE
Code Group
11110
01001
10100
10101
01010
01011
01110
Sym
0
1
2
3
4
5
6
Receiver Interpretation
0
0000
DATA
1
0001
2
0010
3
0011
4
0100
5
0101
6
0110
Transmitter Interpretation
0
0000
DATA
1
0001
2
0010
3
0011
4
0100
5
0101
6
0110
DS00001925A-page 96
 2015 Microchip Technology Inc.