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LAN9353 Datasheet, PDF (399/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII
LAN9353
• The messageType field of the PTP header is checked and only those messages enabled via the RX PTP Mes-
sage Type Enable (RX_PTP_MESSAGE_EN[15:0]) bits in the 1588 Port x RX Timestamp Configuration Register
(1588_RX_TIMESTAMP_CONFIG_x) will be have their ingress times saved. Typically Sync, Delay_Req, PDe-
lay_Req and PDelay_Resp messages are enabled.
• The versionPTP field of the PTP header is checked against the RX PTP Version (RX_PTP_VERSION[3:0]) field in
the 1588 Port x RX Timestamp Configuration Register (1588_RX_TIMESTAMP_CONFIG_x). Only those mes-
sages with a matching version will be have their ingress times saved. A setting of 0 allows any PTP version.
Note: Support for the IEEE 1588-2002 (v1) packet format is not provided.
• If enabled via the RX PTP Domain Match Enable (RX_PTP_DOMAIN_EN) bit in the 1588 Port x RX Timestamp
Configuration Register (1588_RX_TIMESTAMP_CONFIG_x), the domainNumber field of the PTP header is
checked against the RX PTP Domain (RX_PTP_DOMAIN[7:0]) value in the same register. Only those messages
with a matching domain will be have their ingress times saved.
• If enabled via the RX PTP Alternate Master Enable (RX_PTP_ALT_MASTER_EN) bit in the 1588 Port x RX Time-
stamp Configuration Register (1588_RX_TIMESTAMP_CONFIG_x), the alternateMasterFlag in the flagField of
the PTP header is checked and only those messages with an alternateMasterFlag set to 0 will be have their
ingress times saved.
At the end of the frame, the frame’s FCS and the UDP checksum (for IPv4 and IPv6 formats) are verified. FCS checking
can be disabled using the RX PTP FCS Check Disable (RX_PTP_FCS_DIS) bit in the 1588 Port x RX Timestamp Con-
figuration Register (1588_RX_TIMESTAMP_CONFIG_x). UDP checksum checking can be disabled using the RX PTP
UDP Checksum Check Disable (RX_PTP_UDP_CHKSUM_DIS) bit in the same register.
Note: A IPv4 UDP checksum value of 0x0000 indicates that the checksum is not included and is considered a
pass. A IPv6 UDP checksum value of 0x0000 is invalid and is considered a fail.
Note: For IPv6, the UDP checksum calculation includes the IPv6 Pseudo header. Part of the IPv6 Pseudo header
is the final IPv6 destination address.
If the IPv6 packet does not contain a Routing header, then the final IPv6 destination address is the destina-
tion address contained in the IPv6 header.
If the IPv6 packet does contain a Routing header, then the final IPv6 destination address is the address in
the last element of the Routing header.
Note: The UDP checksum is calculated over the entire UDP payload as indicated by the UDP length field and not
the assumed PTP packet length.
Note: The UDP checksum calculation does not included layer 2 pad bytes, if any.
If the FCS and checksum tests pass:
• The latency adjusted, 1588 Clock value, saved above at the start of the frame, is recorded into the 1588 Port x RX
Ingress Time Seconds Register (1588_RX_INGRESS_SEC_x) and 1588 Port x RX Ingress Time NanoSeconds
Register (1588_RX_INGRESS_NS_x).
• The messageType and sequenceId fields and 12-bit CRC of the portIdentity field of the PTP header are recorded
into the Message Type (MSG_TYPE), Sequence ID (SEQ_ID) and Source Port Identity CRC (SRC_PRT_CRC)
fields of the 1588 Port x RX Message Header Register (1588_RX_MSG_HEADER_x).
The 12-bit CRC of the portIdentity field is created by using the polynomial of X12 + X11 + X3 + X2 + X + 1.
• The corresponding maskable 1588 RX Timestamp Interrupt (1588_RX_TS_INT[2:0]) is set in the 1588 Interrupt
Status Register (1588_INT_STS).
Up to four receive events are saved per port with the count shown in the 1588 RX Timestamp Count (1588_RX-
_TS_CNT[2:0]) field in the 1588 Port x Capture Information Register (1588_CAP_INFO_x). Additional events are not
recorded. When the appropriate 1588 RX Timestamp Interrupt (1588_RX_TS_INT[2:0]) bit is written as a one to clear,
1588 RX Timestamp Count (1588_RX_TS_CNT[2:0]) will decrement. If there are remaining events, the capture regis-
ters will update to the next event and the interrupt will set again.
PDELAY_REQ INGRESS TIME SAVING
One-step Pdelay_Resp messages sent by the Host, require their correctionField to be calculated on-the-fly to include
the turnaround time between the ingress of the Pdelay_Req and the egress time of the Pdelay_Resp.
 2015 Microchip Technology Inc.
DS00001925A-page 399