LAN9353 Datasheet, PDF (13/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

3.2 64-TQFP-EP Pin Assignments
FIGURE 3-2:
64-TQFP-EP PIN ASSIGNMENTS (TOP VIEW)
LAN9353
P0_CRS*
P1_DUPLEX/P1_MDC^{† 49}
P0_COL*
P1_SPEED/P1_MDIO^{† 50}
VDD33TXRX1 51
TXNA 52
TXPA 53
RXNA 54
RXPA 55
VDD12TX1 56
RBIAS 57
VDD33BIAS 58
VDD12TX2 59
RXPB 60
RXNB 61
TXPB 62
TXNB 63
VDD33TXRX2 64
LAN9353
64-TQFP-EP
(Top View)
VSS
(Connect exposed pad to ground with a via field)
32 VDDIO
31
P0_IND3*
P1_IND1^†
30
P0_IND2*
P1_IND0^†
29
P0_INCLK*
P1_REFCLK/P1_MODE0^†
28 P0_IND1
27 P0_IND0
26 P0_INDV
25
P0_OUTCLK/P0_REFCLK/P0_MODE0*
P0_REFCLK/P0_MODE0^†
24 VDDCR
23 P0_OUTDV
22 P0_OUTD0/P0_MODE1
21 P0_OUTD1/P0_MODE2
20 VDDIO
19
P0_OUTER/P0_SPEED*
P0_SPEED^†
18 LED4/GPIO4/1588EN
17 LED5/GPIO5/PHYADD
Note: Exposed pad (VSS) on bottom of package must be connected to ground with a via field.
* Pin function(s) when P1_INTPHY configuration strap = 1b (1xMII/RMII).
† _{Pin function(s) when P1_INTPHY configuration strap = 0b (2xRGMI).}
Note: When a “#” is used at the end of the signal name, it indicates that the signal is active low. For example,
RST# indicates that the reset signal is active low.
The buffer type for each signal is indicated in the “Buffer Type” column of the pin description tables in Sec-
tion 3.3, "Pin Descriptions". A description of the buffer types is provided in Section 1.2, "Buffer Types".
 2015 Microchip Technology Inc.
DS00001925A-page 13