LAN9353 Datasheet, PDF (259/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
10.7.2 SWITCH PORT 0, PORT 1 AND PORT 2 CSRS
This section details the switch Port 0, Port 1 and Port 2 CSRs. Each port provides a functionally identical set of registers
which allow for the configuration of port settings, interrupts and the monitoring of the various packet counters.
Because the Port 0, Port 1 and Port 2 CSRs are functionally identical, their register descriptions have been consolidated.
A lowercase “x” has been appended to the end of each switch port register name in this section, where “x” should be
replaced with “0”, “1” or “2” for the Port 0, Port 1 or Port 2 registers respectively. A list of the Switch Port 0, Port 1 and
Port 2 registers and their corresponding register numbers is included in TABLE 10-9:.
10.7.2.1 Port x MAC Version ID Register (MAC_VER_ID_x)
Register #:
Port0: 0400h
Port1: 0800h
Port2: 0C00h
Size:
32 bits
This read-only register contains switch device ID information, including the device type, chip version and revision codes.
Bits
31:12
11:8
7:4
3:0
Description
RESERVED
Device Type Code (DEVICE_TYPE)
Chip Version Code (CHIP_VERSION)
Revision Code (REVISION)
Type
RO
RO
RO
RO
Default
-
5h
9h
3h
 2015 Microchip Technology Inc.
DS00001925A-page 259