LAN9353 Datasheet, PDF (229/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
bit, at which time the address in the Switch Fabric CSR Interface Command Register (SWITCH_CSR_CMD) is incre-
mented or decremented accordingly. The user may then initiate a subsequent write cycle by writing the desired data into
the Switch Fabric CSR Interface Data Register (SWITCH_CSR_DATA).
The third write method is to use the direct data range write function. Writes within the Switch Fabric CSR Interface Direct
Data Registers (SWITCH_CSR_DIRECT_DATA) address range automatically set the appropriate register address, set
all four CSR Byte Enable (CSR_BE[3:0]) bits, clears the Read/Write (R_nW) bit and set the CSR Busy (CSR_BUSY)
bit of the Switch Fabric CSR Interface Command Register (SWITCH_CSR_CMD). The completion of the write cycle is
indicated by the clearing of the CSR Busy (CSR_BUSY) bit. Since the address range of the Switch Fabric CSRs
exceeds that of the Switch Fabric CSR Interface Direct Data Registers (SWITCH_CSR_DIRECT_DATA) address range,
a sub-set of the Switch Fabric CSRs is mapped to the Switch Fabric CSR Interface Direct Data Registers (SWITCH_CS-
R_DIRECT_DATA) address range as detailed in Table 10-8, “Switch Fabric CSR to SWITCH_CSR_DIRECT_DATA
Address Range Map,” on page 243.
Figure 10-8 illustrates the process required to perform a Switch Fabric CSR write. The minimum wait periods as spec-
ified in Table 5-2, “Read After Write Timing Rules,” on page 47 are required where noted.
FIGURE 10-8:
SWITCH FABRICS CSR WRITE ACCESS FLOW DIAGRAM
CSR Write
Idle
CSR Write Auto
Increment /
Decrement
Idle
CSR Write Direct
Address
Idle
Write Data
Register
Write
Command
Register
Write
Direct
Data
Register
Range
min wait period
Write
Command
Register
min wait period
Write Data
Register
min wait period
CSR_BUSY = 0
Read
Command
Register
CSR_BUSY = 1
CSR_BUSY = 0
Read
Command
Register
CSR_BUSY = 0
CSR_BUSY = 1
Read
Command
Register
CSR_BUSY = 1
10.5.5 SWITCH FABRIC CSR READS
To perform a read of an individual Switch Fabric register, the read cycle must be initiated by performing a single write
to the Switch Fabric CSR Interface Command Register (SWITCH_CSR_CMD) with the CSR Busy (CSR_BUSY) bit set,
the CSR Address (CSR_ADDR[15:0]) field set to the desired register address, the Read/Write (R_nW) bit set and the
Auto Increment (AUTO_INC) and Auto Decrement (AUTO_DEC) fields cleared. Valid data is available for reading when
the CSR Busy (CSR_BUSY) bit is cleared, indicating that the data can be read from the Switch Fabric CSR Interface
Data Register (SWITCH_CSR_DATA).
A second read method may be used which utilizes the auto increment/decrement function of the Switch Fabric CSR
Interface Command Register (SWITCH_CSR_CMD) for reading sequential register addresses. When using this
method, the Switch Fabric CSR Interface Command Register (SWITCH_CSR_CMD) must first be written with the CSR
Busy (CSR_BUSY) bit set, the Auto Increment (AUTO_INC) or Auto Decrement (AUTO_DEC) bit set, the CSR Address
(CSR_ADDR[15:0]) field written with the desired register address and the Read/Write (R_nW) bit set. The completion
of a read cycle is indicated by the clearing of the CSR Busy (CSR_BUSY) bit, at which time the data can be read from
the Switch Fabric CSR Interface Data Register (SWITCH_CSR_DATA). When the data is read, the address in the
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DS00001925A-page 229