LAN9353 Datasheet, PDF (133/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
9.2.20.7 PHY x Auto-Negotiation Expansion Register (PHY_AN_EXP_x)
Index (decimal): 6
Size:
16 bits
This read/write register is used in the Auto-Negotiation process between the link partner and the PHY.
Bits
Description
Type
15:7 RESERVED
RO
6
Receive Next Page Location Able
RO
0 = Received next page storage location is not specified by bit 6.5
1 = Received next page storage location is specified by bit 6.5
5
Received Next Page Storage Location
RO
0 = Link partner next pages are stored in the PHY x Auto-Negotiation Link
Partner Base Page Ability Register (PHY_AN_LP_BASE_ABILITY_x) (PHY
register 5)
1 = Link partner next pages are stored in the PHY x Auto Negotiation Next
Page RX Register (PHY_AN_NP_RX_x) (PHY register 8)
4
Parallel Detection Fault
This bit indicates whether a Parallel Detection Fault has been detected.
RO/LH
0: A fault hasn’t been detected via the Parallel Detection function
1: A fault has been detected via the Parallel Detection function
3
Link Partner Next Page Able
RO
This bit indicates whether the link partner has next page ability.
0: Link partner does not contain next page capability
1: Link partner contains next page capability
2
Next Page Able
RO
This bit indicates whether the local device has next page ability.
0: Local device does not contain next page capability
1: Local device contains next page capability
1
Page Received
This bit indicates the reception of a new page.
RO/LH
0: A new page has not been received
1: A new page has been received
0
Link Partner Auto-Negotiation Able
RO
This bit indicates the Auto-Negotiation ability of the link partner.
0: Link partner is not Auto-Negotiation able
1: Link partner is Auto-Negotiation able
Default
-
1b
1b
0b
0b
1b
0b
0b
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DS00001925A-page 133