LAN9353 Datasheet, PDF (192/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
9.3.5.3 Port x Virtual PHY Identification MSB Register (VPHY_ID_MSB_x)
Offset:
PORT0: 1C8h
PORT1: 0C8h
Index (decimal): 2
Size:
32 bits
16 bits
This read/write register contains the MSB of the Virtual PHY Organizationally Unique Identifier (OUI). The LSB of the
Virtual PHY OUI is contained in the Port x Virtual PHY Identification LSB Register (VPHY_ID_LSB_x).
Bits
Description
31:16 RESERVED
(See Note 45)
15:0 PHY ID
This field contains the MSB of the Virtual PHY OUI (Note 46).
Type
RO
R/W
Default
-
0000h
Note 45: The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on a DWORD bound-
ary. When accessed serially (through the MII management protocol), the register is 16-bits wide.
Note 46: IEEE allows a value of zero in each of the 32-bits of the PHY Identifier.
DS00001925A-page 192
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