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LAN9353 Datasheet, PDF (221/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII
LAN9353
VID bit 6 indicates a request to follow VLAN rules.
If VID bit 6 is zero, a default membership of “all ports” is assumed and no VLAN rules are followed.
If VID bit 6 is one, all ingress and egress VLAN rules are followed. The procedure described in Section 10.3.2, "For-
warding Rules," on page 209 is followed with the exception that the special tag is skipped and the VID is taken from the
second VLAN tag if it exists.
Upon egress from the destination port(s), the special tag is removed. If a regular VLAN tag needs to be sent as part of
the packet, then it should be part of the packet data from the host CPU following the special tag.
When specifying Port 0 as the destination port, the VID will be set to 0. A VID of 0 is normally considered a priority tagged
packet. Such a packet will be filtered if Admit Only VLAN is set on the host CPU port. Either avoid setting Admit Only
VLAN on the host CPU port or set an unused bit in the VID field.
Note:
The maximum size tagged packet that can normally be sent into a switch port (on port 0) is 1522 bytes.
Since the special tag consumes four bytes of the packet length, the outgoing packet is limited to 1518 bytes,
even if it contains a regular VLAN tag as part of the packet data. If a larger outgoing packet is required, the
Jumbo2K bit in the Port x MAC Receive Configuration Register (MAC_RX_CFG_x) of Port 0 should be set.
10.3.10.2 Packets to the Host CPU
The Buffer Manager Egress Port Type Register (BM_EGRSS_PORT_TYPE) configures the switch to add the special
VLAN tag in packets to the host CPU as a source port indicator. A setting of 11b should be used only on the port that is
connected to the host CPU (typically Port 0). Other settings can be used on the normal network ports as needed.
The special VLAN tag is a normal VLAN tag where:
• The priority field indicates the packet’s priority as classified on receive.
• Bits 0 and 1 of the VID field specify the source port (0, 1 or 2).
• Bit 3 of the VID field indicates the packet was a monitored IGMP or MLD packet.
• Bit 4 of the VID field indicates STP override was set (Static and Age 1/Override bits set) in the ALR entry for the
packet’s Destination MAC Address.
• Bit 5 of the VID field indicates the Static bit was set in the ALR entry for the packet’s Destination MAC address.
• Bit 6 of the VID field indicates Priority Enable was set in the ALR entry for the packet’s Destination MAC address.
• Bits 7, 8 and 9 of the VID field are the Priority field in the ALR entry for the packet’s Destination MAC address -
these can be used as a tag to identify different packet types (PTP, RSTP, etc.) when the host CPU adds MAC
address entries.
Note: Bits 4 through 9 of the VID field will be all zero for Destination MAC Addresses that have been learned (i.e.,
not added by the host) or are not found in the ALR table (i.e., not learned or added by the host).
Upon egress from the host CPU port, the special tag is added. If a regular VLAN tag already exists, it is not deleted.
Instead it will follow the special tag.
10.3.11 COUNTERS
A counter is maintained per port that contains the number of MAC address that were not learned or were overwritten by
a different address due to MAC Address Table space limitations. These counters are accessible via the following regis-
ters:
• Switch Engine Port 0 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_0)
• Switch Engine Port 1 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_1)
• Switch Engine Port 2 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_2)
A counter is maintained per port that contains the number of packets filtered at ingress. This count includes packets
filtered due to broadcast throttling, but does not include packets dropped due to ingress rate limiting. These counters
are accessible via the following registers:
• Switch Engine Port 0 Ingress Filtered Count Register (SWE_FILTERED_CNT_0)
• Switch Engine Port 1 Ingress Filtered Count Register (SWE_FILTERED_CNT_1)
• Switch Engine Port 2 Ingress Filtered Count Register (SWE_FILTERED_CNT_2)
 2015 Microchip Technology Inc.
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